代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
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vhd mux.vhd
-------------------------------------------------------------------------------
-- Title : mux
-- Project :
-------------------------------------------------------------------------------
--
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vhd conj.vhd
-------------------------------------------------------------------------------
-- Title : Conj.vhd
-- Project :
------------------------------------------------------------------------------
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vhd parallel.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
-- Uncomment the following lines to use the declarations that are
-- provided for instantia
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vhd clock.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity clock is
port(clk,clk2:in std_logic;
show:out std_logic_vector(6 downt
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vhd yima.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity yima is
port(kin3,kin2,kin1,kin0:in std_logic;
sel2,sel1,sel0:in std_logic;
Y:out std_l
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vhd ywjcq.vhd
library ieee;
use ieee.std_logic_1164.all;
entity ywjcq is
port(clk,load:in std_logic;
y:in std_logic_vector(6 downto 0);
dout:buffer std_logic_vector(6 downto 0));
end ywjcq;
archite
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m uwb_sv_params.m
function [Lam,lambda,Gam,gamma,std_ln_1,std_ln_2,nlos,std_shdw] = uwb_sv_params( cm_num ) %返回四种信道的sv的参数，cm_num分别取cm1,cm2,cm3,cm4
% Return S-V model parameters for standard UWB channel models
% Lam
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txt 48_4.12.txt
--clk 10ns
--clk2 20ns
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity FourToEight is
port (
clk: IN STD_LOGIC;
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vhd coder138.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY CODER138 IS
PORT (en1:IN STD_LOGIC;
en2:IN STD_LOGIC;
en3:IN STD_LOGIC;
a: IN STD_LOGIC_VECTOR(2 DOWNTO 0);
co: OUT
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vhd mcutofpga.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity McuToFpga is
generic(QWidth : Integer := 24); --移位寄存器的宽度
port(
CLK: in std_logic; --同步时钟,上升研写入数据
DA