代码搜索：std

找到约 10,000 项符合「std」的源代码

代码结果 10,000
热门代码： main.c GPIO I2C SPI UART timer interrupt ADC PWM LED
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vhd lu20040094.vhd

LIBRARY altera; LIBRARY IEEE; USE altera.maxplus2.ALL; USE IEEE.std_logic_1164.ALL; ENTITY LU20040094 IS PORT ( s: in STD_LOGIC_VECTOR (15 DOWNTO 0); m: in STD_LOGIC_VECTOR
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vhd numlatch.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity Numlatch is port (clock,en:in std_logic; numina:in std_logic_vector(3 downto 0); numinb:in std_logic_vecto
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vhd data_pro.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity data_pro is port ( clk:in std_logic; enable:in std_logic; Numf1,Numf2,Numf3:in std_logic_vector(3 downto
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vhd baseclk.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity baseclk is port ( clk1M,clk100k:in std_logic; period:in std_logic; clk:out std_logic ); end; archit
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vhd clock.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; entity clock is port(clk:in std_logic; reset:in std_logic; dins:in s
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vhd led.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity Led is port (En:in std_logic; Numin: in integer range 0 to 9; Numout: out std_logic_vector(0 to 6) ); en
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vhd ps2.vhd

library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_unsigned.all; entity PS2 is port ( KBdata: in STD_LOGIC; KBCLK: in STD_LOGIC; DOUT: out STD_LOGIC_VEC
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vhd binary_upcounter.vhd

--Generated Binary Up Counter --The first design entity is a T-type flip-flop. The second is an scalable synchronous binary up counter illustrating the use of the generate statement to produce regular
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vhd 7人表决器vote7.vhd

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; ENTITY vote7 IS PORT ( men : IN std_logic_vector(6 downto 0); pass,stop : buffer std_logic ); END vote7; ARCHITECTU
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vhd cnt8.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT8 IS PORT ( CLK, LD : IN STD_LOGIC; D : IN STD_LOGIC_VECTOR(3 DOWNTO 0); CAO
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