代码搜索:std

找到约 10,000 项符合「std」的源代码

代码结果 10,000
www.eeworm.com/read/494141/6379000

bak counter10.vhd.bak

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT10 IS PORT(CLK:IN STD_LOGIC; RESET:IN STD_LOGIC; COUNTER:OUT STD_LO
www.eeworm.com/read/494141/6379002

vhd counter10.vhd

--文件名:counter10.vhd。 --功能:10进制计数器,有进位C --最后修改日期:2009.4.18 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity counter10 is Port
www.eeworm.com/read/494141/6379070

vhd counter24.vhd

--文件名:counter24.vhd。 --功能:24进制计数器。 --最后修改日期:2004.3.20 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity counter24 is Port ( c
www.eeworm.com/read/493986/6386155

vhd testmachine.vhd

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; -- Uncomment the following lines to use the declarations that are -- provided for ins
www.eeworm.com/read/493781/6390605

vhd dds_vhdl.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY DDS_VHDL IS -- 顶层设计 PORT ( CLK : IN STD_LOGIC; CLK_DA
www.eeworm.com/read/493793/6390998

vhd cnt24.vhd

LIBRARY IEEE; -- 24进制计数器 USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT24 IS PORT ( CLK,EN, U_D : IN STD_LOGIC;
www.eeworm.com/read/493461/6393753

vhd cell8.vhd

-------------------------------------------------------------------------------- -- Company: -- Engineer: -- -- Create Date: 10:06:49 04/22/08 -- Design Name: -- Module Name: cell8 -
www.eeworm.com/read/493461/6393766

vhd cell15.vhd

-------------------------------------------------------------------------------- -- Company: -- Engineer: -- -- Create Date: 10:06:49 04/22/08 -- Design Name: -- Module Name: cell15 -
www.eeworm.com/read/493461/6393770

vhd cell14.vhd

-------------------------------------------------------------------------------- -- Company: -- Engineer: -- -- Create Date: 10:06:49 04/22/08 -- Design Name: -- Module Name: cell14 -
www.eeworm.com/read/493461/6393786

vhd cell20.vhd

-------------------------------------------------------------------------------- -- Company: -- Engineer: -- -- Create Date: 10:06:49 04/22/08 -- Design Name: -- Module Name: cell20 -