代码搜索：std
找到约 10,000 项符合「std」的源代码
代码结果 10,000
www.eeworm.com/read/450842/7476005
vhd leon_eth.vhd
----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This library
www.eeworm.com/read/450842/7476009
vhd ahbstat.vhd
----------------------------------------------------------------------------
-- This file is a part of the LEON VHDL model
-- Copyright (C) 1999 European Space Agency (ESA)
--
-- This library
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vhdl usb_new_usbvpb_top_str.vhdl
--------------------------------------------------------------------------------
--
-- P H I L I P S C O M P A N Y R E S T R I C T E D
--
-- Copyright
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vhdl usb_new_usbpvci_ent.vhdl
--------------------------------------------------------------------------------
--
-- P H I L I P S C O M P A N Y R E S T R I C T E D
--
-- Copyright
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vhd rom.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY rom IS
PORT(
dataout:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);--数据输出
addr:IN S
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bak mx_7821.vhd.bak
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity mx_7821 is
port (clk: in std_logic;
din: in std_logic_vector (7 downto
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vhd mx_7821.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity mx_7821 is
port (clk: in std_logic;
din: in std_logic_vector (7 downto
www.eeworm.com/read/449912/7494076
vhd mux6.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity mux6 is
port(cnthh,cnthl,cntmh,cntml,cntsh,cntsl: in std
www.eeworm.com/read/449907/7494521
vhd mux6.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity mux6 is
port(cnthh,cnthl,cntmh,cntml,cntsh,cntsl: in std
www.eeworm.com/read/449872/7495261
vhd sdr_sdram.vhd
library ieee;
use ieee.std_logic_1164.all;
entity sdr_sdram is
generic (
ASIZE : integer := 22;
DSIZE : integer := 32;
ROWSIZE