代码搜索:shift
找到约 10,000 项符合「shift」的源代码
代码结果 10,000
www.eeworm.com/read/488271/6491196
vhd outstr_shift.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_SIGNED.ALL;
use ieee.std_logic_arith.all;
ENTITY outstr_shift IS
PORT(clk : in std_logic;
input :
www.eeworm.com/read/488271/6491199
vhd shift_iteb.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY shift_iteb IS
PORT
(
clk : in std_logic;
din : in std
www.eeworm.com/read/488271/6491201
vhd bufwe_shift.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_SIGNED.ALL;
use ieee.std_logic_arith.all;
ENTITY bufwe_shift IS
PORT(clk : in std_logic;
input : in
www.eeworm.com/read/488271/6491206
vhd shift_pri.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY shift_pri IS
PORT
(
clk : in std_logic;
indata : in
www.eeworm.com/read/486947/6521388
vhd shift_register.vhd
-- 库声明
library IEEE;
use IEEE.STD_LOGIC_1164.all;
-- 实体声明
entity shift_register is
-- 类属参数
generic (
TOTAL_BIT : integer := 10 );
-- 端口
port (
clk : in std_logic;
reset_n : in std_lo
www.eeworm.com/read/486190/6537755
unicodemap shift-jis.unicodemap
000a 0a
000c 0c
000d 0d
0020 8140
0021 8149
0022 8168
0023 8194
0024 8190
0025 8193
0026 8195
0027 8166
0028 0029 8169
002a 8196
002b 817b
002c 8143
002d 815d
002e 8144
002f 815e
0030 0039 824f
003a 0
www.eeworm.com/read/486345/6540236
m shift_rows.m
function state_out = shift_rows (state_in)
%SHIFT_ROWS Cyclically shift the rows of the state matrix.
%
% STATE_OUT = SHIFT_ROWS (STATE_IN)
% cyclically shifts the last three rows of the sta
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vhd shift_logic.vhd
--SINGLE_FILE_TAG
-------------------------------------------------------------------------------
-- $Id: shift_logic.vhd,v 1.1 2007/10/12 09:11:36 stefana Exp $
--------------------------------------
www.eeworm.com/read/103953/6582110
ncf cmd_shift_in.ncf
#
# Constraints generated by Synplify Pro 7.3, Build 170R
#
# Period Constraints
#Begin clock constraints
#End clock constraints
# Output Constraints
# Input Constraints
# Location Con