代码搜索：shift
找到约 10,000 项符合「shift」的源代码
代码结果 10,000
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obj bcd shift.obj
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vhd mapena_shift.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_SIGNED.ALL;
use ieee.std_logic_arith.all;
ENTITY mapena_shift IS
PORT(clk : in std_logic;
input :
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vhd fjena_shift.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_SIGNED.ALL;
use ieee.std_logic_arith.all;
ENTITY fjena_shift IS
PORT(clk : in std_logic;
input : i
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vhd fjturn_shift.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_SIGNED.ALL;
use ieee.std_logic_arith.all;
ENTITY fjturn_shift IS
PORT(clk : in std_logic;
input :
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vhd shift18.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY shift18 IS
PORT
(
clk : in std_logic;
indata : in
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vhd shift20.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY shift20 IS
PORT
(
clk : in std_logic;
di
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vhd shift_set.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY shift_set IS
PORT
(
clk : in std_logic;
indata : in
www.eeworm.com/read/488271/6491188
vhd shift_midw.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY shift_midw IS
PORT
(
clk : in std_logic;
incol : in
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vhd shift_mid.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY shift_mid IS
PORT
(
clk : in std_logic;
indata : in