代码搜索:dataIn

找到约 2,888 项符合「dataIn」的源代码

代码结果 2,888
www.eeworm.com/read/320591/13422533

hier_info ppm.hier_info

|PPM PPM_out N_pulser:inst3.clk CLK => divclk:inst.clk_in Data_in => S_to_P:inst2.sin |PPM|N_pulser:inst3 clk => tmp.CLK sin => tmp.DATAIN sin => pulse~0.IN1
www.eeworm.com/read/17522/733241

hier_info control.hier_info

|control clk => count[0].CLK clk => count[1].CLK clk1024 => bee~0.DATAB clk1024 => clrc~reg0.CLK clk1024 => setb~reg0.CLK clk1024 => seta~reg0.CLK clk500 => bee~3.DATAB sa => seta~reg0.DATAIN
www.eeworm.com/read/17522/734048

hier_info hcq.hier_info

|hcq ena => comb~0.OE ena => comb~1.OE ena => comb~2.OE ena => comb~3.OE ena => comb~4.OE ena => comb~5.OE ena => comb~6.OE ena => comb~7.OE input[0] => comb~0.DATAIN input[1] => comb~1.DATA
www.eeworm.com/read/17619/743439

hier_info timer.hier_info

|Timer Clk => Clk~0.IN1 Sw_n[0] => dff_A.DATAIN Sw_n[1] => ~NO_FANOUT~ Sw_n[2] => ~NO_FANOUT~ Sw_n[3] => ~NO_FANOUT~ Sev_Seg_Led_Sel_n[0]
www.eeworm.com/read/476527/1368515

hier_info control.hier_info

|control clk => count[0].CLK clk => count[1].CLK clk1024 => bee~0.DATAB clk1024 => clrc~reg0.CLK clk1024 => setb~reg0.CLK clk1024 => seta~reg0.CLK clk500 => bee~3.DATAB sa => seta~reg0.DATAIN
www.eeworm.com/read/476527/1368653

hier_info hcq.hier_info

|hcq ena => comb~0.OE ena => comb~1.OE ena => comb~2.OE ena => comb~3.OE ena => comb~4.OE ena => comb~5.OE ena => comb~6.OE ena => comb~7.OE input[0] => comb~0.DATAIN input[1] => comb~1.DATA
www.eeworm.com/read/467020/1507530

hier_info timer.hier_info

|Timer Clk => Clk~0.IN1 Sw_n[0] => dff_A.DATAIN Sw_n[1] => ~NO_FANOUT~ Sw_n[2] => ~NO_FANOUT~ Sw_n[3] => ~NO_FANOUT~ Sev_Seg_Led_Sel_n[0]
www.eeworm.com/read/147842/12516028

hier_info etester.hier_info

|ETESTER BCLK => ~NO_FANOUT~ TCLK => ENA.CLK TCLK => MA~0.IN1 TCLK => MA~1.IN1 CLR => ENA.ACLR CLR => Q1.ACLR CLR => Q2.ACLR CLR => Q3.ACLR CL => MA~0.IN0 CL => MA~1.IN0 CL => ENA.DATAIN S
www.eeworm.com/read/317989/13491046

hier_info dds_cordic.hier_info

|DDS_CORDIC daclk daclk.DATAIN sys_clk => cordic_m1_rot:inst.clk sys_clk => lpm_add_sub_16bit:inst2.clock eps[0]
www.eeworm.com/read/301035/13868922

hier_info dds_vhdl.hier_info

|DDS_VHDL CLK => sin_rom:u6.inclock CLK => reg10b:u5.Load CLK => sin_rom:u3.inclock CLK => reg32b:u2.Load CLK => clK20M.DATAIN FWORD[0] => ~NO_FANOUT~ FWORD[1] => ~NO_FANOUT~ FWORD[2] => ~NO_F