代码搜索:dataIn

找到约 2,888 项符合「dataIn」的源代码

代码结果 2,888
www.eeworm.com/read/18515/792015

v eth_register.v

`include "timescale.v" module eth_register(DataIn, DataOut, Write, Clk, Reset, SyncReset); parameter WIDTH = 8; // default parameter of the register width parameter RESET_VALUE = 0; in
www.eeworm.com/read/18518/792648

v eth_register.v

`include "timescale.v" module eth_register(DataIn, DataOut, Write, Clk, Reset, SyncReset); parameter WIDTH = 8; // default parameter of the register width parameter RESET_VALUE = 0; in
www.eeworm.com/read/18590/796155

v eth_register.v

`include "timescale.v" module eth_register(DataIn, DataOut, Write, Clk, Reset, SyncReset); parameter WIDTH = 8; // default parameter of the register width parameter RESET_VALUE = 0; in
www.eeworm.com/read/32675/1035378

v eth_register.v

`include "timescale.v" module eth_register(DataIn, DataOut, Write, Clk, Reset, SyncReset); parameter WIDTH = 8; // default parameter of the register width parameter RESET_VALUE = 0; in
www.eeworm.com/read/40270/1138647

v eth_register.v

`include "timescale.v" module eth_register(DataIn, DataOut, Write, Clk, Reset, SyncReset); parameter WIDTH = 8; // default parameter of the register width parameter RESET_VALUE = 0; in
www.eeworm.com/read/231617/4713912

out count60.out

Warning: Variable 'datain' is being read in routine count60 line 19 in file 'G:/Documents and Settings/hejianbin/My Documents/vhdl/count60.vhd', but is not in the process sensitivity list of the
www.eeworm.com/read/312037/3676463

out count60.out

Warning: Variable 'datain' is being read in routine count60 line 19 in file 'G:/Documents and Settings/hejianbin/My Documents/vhdl/count60.vhd', but is not in the process sensitivity list of the
www.eeworm.com/read/422566/2036393

vhd _primary.vhd

library verilog; use verilog.vl_types.all; entity apex20ke_pterm_register is generic( power_up : string := "low" ); port( datain : in vl_logic;
www.eeworm.com/read/173252/9664617

v lcd_control.v

module lcd_control( clk, lcd_enable,datain, clkout,sd,hsy,vsy,data,oe, get,power_ok,power_down, v1,v
www.eeworm.com/read/148012/12501317

vhd epp.vhd

LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; --********************************************* ENTITY EPP is PORT( clk,nDataStrobe,nInit,empty : IN STD_LOGIC; DataIn : IN STD_LOGIC_VECTOR(7 D