count60.out

来自「vhdl编程实例」· OUT 代码 · 共 27 行

Warning: Variable 'datain' is being read 
	in routine count60 line 19 in file 'G:/Documents and Settings/hejianbin/My Documents/vhdl/count60.vhd', 
	but is not in the process sensitivity list of the block which begins 
	there.   (HDL-179)

Inferred memory devices in process 
	in routine count60 line 19 in file
         'G:/Documents and Settings/hejianbin/My Documents/vhdl/count60.vhd'.
===============================================================================
|    Register Name    |   Type    | Width | Bus | MB | AR | AS | SR | SS | ST |
===============================================================================
|      bcd1n_reg      | Flip-flop |   4   |  Y  | N  | N  | N  | N  | N  | N  |
|     bcd10n_reg      | Flip-flop |   3   |  Y  | N  | N  | N  | N  | N  | N  |
===============================================================================

bcd1n_reg (width 4)
-------------------
    set/reset/toggle: none


bcd10n_reg (width 3)
--------------------
    set/reset/toggle: none


Writing to hnl file 'E:\vhdl_tools\100Examples\TEMP\hjb/workdirs/WORK/count60.hnl'