代码搜索：codein
找到约 22 项符合「codein」的源代码
代码结果 22
www.eeworm.com/read/457791/7317741
v coder.v
module Coder(clr,clk,codein,outp,outn);
input clr,clk,codein;
output outp,outn;
reg [3:0] temp_data; //暂存输入的codein
reg [3:0] temp_p; //调整占空比之前的outp
reg [3:0] temp_n; //调整占空比之前的outn
www.eeworm.com/read/188244/8555354
bak decode.v.bak
module decode(clk,rst,codein,codeoutv,codeoutb);
input clk,rst;
input codein;
output [1:0] codeoutv;
output [1:0] codeoutb;
reg [2:0] count0;
reg [2:0] count01;
reg [4:0] count11;
reg [1:0]
www.eeworm.com/read/18022/770968
hier_info framesynch.hier_info
|framesynch
fsynout cnt32:inst.clk
clk => barker:inst7.clk
clk => framecontrol:inst4.ck
codein => barker:inst7.codein
|framesynch|framecontrol:inst4
www.eeworm.com/read/386587/2570419
hier_info framesynch.hier_info
|framesynch
fsynout cnt32:inst.clk
clk => barker:inst7.clk
clk => framecontrol:inst4.ck
codein => barker:inst7.codein
|framesynch|framecontrol:inst4
www.eeworm.com/read/188244/8555380
v decode.v
module decode(clk,rst,codein,codeoutv,codeoutb);
input clk,rst;
input codein;
output [1:0] codeoutv;
output [1:0] codeoutb;
reg [2:0] count0;
reg [2:0] count01;
reg [4:0] count11;
reg [1:0] codeoutv,
www.eeworm.com/read/188244/8555350
vhd _primary.vhd
library verilog;
use verilog.vl_types.all;
entity decode is
port(
clk : in vl_logic;
rst : in vl_logic;
codein : in vl_logic;
www.eeworm.com/read/464953/7063753
vhd insertv.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity insertv is
port( clk : in std_logic;
clr : in std_logic;
codein : in std_logic;
c
www.eeworm.com/read/451205/7469253
txt hdb3.txt
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity hdb3_v is
port(reset,clk: in std_logic;
codein: in std_logic_vector(1 downto 0);
cod
www.eeworm.com/read/18022/770934
vhd barker.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity barker is
port(clk,codein:in std_logic;
q:out std_logic_vector(6 downto 0));
end barker;
archit
www.eeworm.com/read/386587/2570404
vhd barker.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity barker is
port(clk,codein:in std_logic;
q:out std_logic_vector(6 downto 0));
end barker;
archit