代码搜索:Verilog

找到约 10,000 项符合「Verilog」的源代码

代码结果 10,000
www.eeworm.com/read/179193/5309157

dump verilog.dump

$date Aug 14, 1997 17:28:33 $end $version VERILOG-XL 2.5 $end $timescale 1ns $end $scope module system $end $var wire 1 ! VMA $end $var wire 1 " R_W $end $var paramete
www.eeworm.com/read/179193/5309305

dump verilog.dump

$date Aug 14, 1997 17:28:33 $end $version VERILOG-XL 2.5 $end $timescale 1ns $end $scope module system $end $var wire 1 ! VMA $end $var wire 1 " R_W $end $var paramete
www.eeworm.com/read/179193/5309310

dump verilog.dump

$date Jul 26, 1997 13:37:48 $end $version VERILOG-XL 2.3.3 $end $timescale 1ns $end $scope module system $end $var wire 1 ! VMA $end $var wire 1 " R_W $end $var parame
www.eeworm.com/read/168634/5441138

dump verilog.dump

$date May 4, 2000 18:30:43 $end $version VERILOG-XL 3.0.p001 $end $timescale 1ns $end $scope module system $end $var wire 1 ! VMA $end $var wire 1 " R_W $end $var par
www.eeworm.com/read/168634/5441143

dump verilog.dump

$date Aug 14, 1997 17:28:33 $end $version VERILOG-XL 2.5 $end $timescale 1ns $end $scope module system $end $var wire 1 ! VMA $end $var wire 1 " R_W $end $var paramete
www.eeworm.com/read/168634/5441291

dump verilog.dump

$date Aug 14, 1997 17:28:33 $end $version VERILOG-XL 2.5 $end $timescale 1ns $end $scope module system $end $var wire 1 ! VMA $end $var wire 1 " R_W $end $var paramete
www.eeworm.com/read/168634/5441296

dump verilog.dump

$date Jul 26, 1997 13:37:48 $end $version VERILOG-XL 2.3.3 $end $timescale 1ns $end $scope module system $end $var wire 1 ! VMA $end $var wire 1 " R_W $end $var parame
www.eeworm.com/read/349723/3141213

key verilog.key

$finish;
www.eeworm.com/read/336629/3349155

make_verilog

verilog \ ../../../bench/verilog/oc8051_tb.v \ ../../../bench/verilog/oc8051_xram.v \ ../../../bench/verilog/oc8051_uart_test.v \ ../../../bench/verilog/oc8051_xrom.v \ ../../../rtl/ve
www.eeworm.com/read/280061/4128384

make_verilog

verilog \ ../../../bench/verilog/oc8051_tb.v \ ../../../bench/verilog/oc8051_xram.v \ ../../../bench/verilog/oc8051_uart_test.v \ ../../../bench/verilog/oc8051_xrom.v \ ../../../rtl/ve