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ORG 0000H LJMP MAIN ORG 0030H MAIN : MOV SP,#60H MOV 10H,#10H MOV 3FH,#0FH MOV 3EH,#00H MOV 3DH,#00H

$ Start of Compile #Fri Jun 30 17:00:38 2000 Synplicity VHDL Compiler, version 6.0.0, built May 19 2000 Copyright (C) 1994-2000, Synplicity Inc. All Rights Reserved VHDL syntax check successf

[COREGEN.VHDL Component Instantiation.logo] type=template text000=" " text001=" " text002="-- The following code must appear in the VHDL architecture header:" text003=" " text004="component logo

$ Start of Compile #Tue May 02 18:43:30 2006 Synplify VHDL Compiler, version 5.1.2, built Apr 14 1999 Copyright (C) 1994-1999, Synplicity Inc. All Rights Reserved VHDL syntax check successful

[COREGEN.VHDL Component Instantiation.tenths] type=template text000=" " text001=" " text002="-- The following code must appear in the VHDL architecture header:" text003=" " text004="component te

-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT.vhd -- VHDL code created by Xilinx's StateCAD 5.03 -- Sat Oct 26 10:39:04 2002 -- This VHDL code (for use with IEEE compliant tools) was generate

-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT.vhd -- VHDL code created by Xilinx's StateCAD 5.03 -- Sat Oct 26 10:39:04 2002 -- This VHDL code (for use with IEEE compliant tools) was generate

-- J:\PROJECTS\ISE\SECTION2\STATECAD_DEMO\TUT.vhd -- VHDL code created by Xilinx's StateCAD 5.03 -- Sat Oct 26 10:39:04 2002 -- This VHDL code (for use with IEEE compliant tools) was generate

$ Start of Compile #Sun Sep 09 01:28:12 2001 Synplify VHDL Compiler, version 5.1.2, built Apr 14 1999 Copyright (C) 1994-1999, Synplicity Inc. All Rights Reserved VHDL syntax check successful

$ Start of Compile #Sun Sep 09 01:26:41 2001 Synplify VHDL Compiler, version 5.1.2, built Apr 14 1999 Copyright (C) 1994-1999, Synplicity Inc. All Rights Reserved VHDL syntax check successful