代码搜索：VHDL - 虫虫电子下载站

vhdl_reference.pdf

direct_implementation.vhdl

LIBRARY ieee; USE ieee.std_logic_1164.ALL; USE ieee.numeric_std.ALL; ENTITY direct_implementation IS GENERIC (WIDTH:INTEGER:=8; N:INTEGER:=4); PORT (reset,start:STD_LOGIC;

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distributed_implementation.vhdl

LIBRARY ieee; USE ieee.std_logic_1164.ALL; USE ieee.numeric_std.ALL; USE ieee.math_real.ALL; ENTITY distributed_implementation IS GENERIC (WIDTH:INTEGER:=8; N:INTEGER:=4); PORT (res

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serial_implementation.vhdl

LIBRARY ieee; USE ieee.std_logic_1164.ALL; USE ieee.numeric_std.ALL; ENTITY serial_implementation IS GENERIC (WIDTH:INTEGER:=8; N:INTEGER:=4); PORT (reset,start,clk:STD_LOGIC;

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vhdl&veriloghdl.pdf

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vhdl—lcd.txt

library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity lcd is Port ( clk : in std_logic; reset : in std_logic;

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