代码搜索：Process
找到约 10,000 项符合「Process」的源代码
代码结果 10,000
www.eeworm.com/read/311774/13625916
c semaph.c
/*
* Provide an simpler and easier to understand interface to the System V
* semaphore system calls. There are 7 routines available to the user:
*
* id = sem_create(key, initval); # create with i
www.eeworm.com/read/311774/13626101
c hello.c
#include "apue.h"
int
main(void)
{
printf("hello world from process ID %d\n", getpid());
exit(0);
}
www.eeworm.com/read/310977/13638743
rpt fir.map.rpt
Analysis & Synthesis report for fir
Sat May 03 12:06:42 2008
Version 6.0 Build 178 04/27/2006 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Not
www.eeworm.com/read/310977/13638815
qmsg fir.map.qmsg
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0}
{ "I
www.eeworm.com/read/310851/13642427
txt 带使能､异步复位端的十二进制计数器的设计.txt
Library ieee ;
Use ieee.std_logic_1164.all ;
Use ieee.std_logic_unsigned.all ;
Entity count12en is port ( clk , clr , en : in std_logic ;
www.eeworm.com/read/310755/13644552
cpp 时间片.cpp
// cpu_time.cpp : Defines the entry point for the console application.
//
//#include "stdafx.h"
/*按时间片轮转法进行CPU调度*/
/*源程序*/
/*—数据结构定义及符号说明*/
/**/
#define N 20
#include
#include
www.eeworm.com/read/310746/13644608
txt dianziqin.txt
module organ(SW,S,CLK,SPEAK);
input CLK;
input [7:1] S;
input [3:1] SW;
ouput SPEAK;
reg[19:0] COUNTER,COUNTER_END;
reg[7:1] S_REG;
always@(posedge CLK
www.eeworm.com/read/310727/13644963
vhd coding.vhd
library ieee;
use ieee.std_logic_1164.all;
entity coding is
port
(A1,A4,A8,en:in std_logic;
d: out integer range 0 to 8
);
end coding;
ARCHITECTURE code of coding is
www.eeworm.com/read/310402/13652475
java experiment1.java
import java.awt.*;
import java.awt.event.*;
import java.util.*;
class Process
{
int length,num;
Process()
{}
Process(int length,int num)
{
www.eeworm.com/read/309833/13663904
vhd transmitter.vhd
----------------------------------------------------------------------------------
-- Company:
-- Engineer:
--
-- Create Date: 16:16:54 12/02/2007
-- Design Name:
-- Module Name: tran