coding.vhd

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library ieee;
use ieee.std_logic_1164.all;
entity coding is
  port
      (A1,A4,A8,en:in std_logic;
       d: out integer range 0 to 8
       );
   end coding;
ARCHITECTURE code of coding is
   begin
    process(A1,A4,A8)
     begin
      if A1='1' and en='1'and A4='0'and A8='0'then d<=1;
      elsif 
       A4='1' and en='1'and A1='0'and A8='0'then d<=4;
      elsif A8='1' and en='1'and A1='0'and A4='0'then d<=8;
      else d<=0;
end if;
end process;
end code;