代码搜索：Numeric
找到约 7,754 项符合「Numeric」的源代码
代码结果 7,754
www.eeworm.com/read/280774/10292627
py compfft.py
#!/usr/bin/env python2.3
# use FFTPACK as a baseline
import FFT
from Numeric import *
import math
import random
import sys
import struct
import fft
pi=math.pi
e=math.e
j=complex(0,1)
lims=(-32768,32
www.eeworm.com/read/162264/10321588
vhd mult2.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity mult2 is
generic(a1:natural:=9;
b1:natural:=12;
q1:natural:=16);
port(clk:in std_logic;
res
www.eeworm.com/read/276983/10690346
cpp p4-190.cpp
#include
#include
#include
using namespace std;
//创建一个list容器的实例LISTINT，其存放int型数据
typedef list LISTINT;
void main(void)
{
//用LISTINT创建一个名为listOne的list对象
www.eeworm.com/read/421425/10736994
vhd three.vhd
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.Numeric_Std.all;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity three is
port(clock:in std_logic;
dout:out std_logic_vector(9 downto 0) );
end three;
arch
www.eeworm.com/read/350014/10776388
vhd sinetest4ksample1.1ksignal.vhd
library ieee;
use ieee.std_logic_1164.all;
--use ieee.numeric_std.all;
use ieee.std_logic_arith.all;
entity SineTest4KSample1_1KSignal is
end entity SineTest4KSample1_1KSignal;
architecture
www.eeworm.com/read/420078/10817968
vhd simple_calc_tb.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.all;
USE ieee.numeric_std.ALL;
ENTITY SIMPLE_CALC_TB_vhd IS
END SIMPLE_CALC_TB_vhd;
ARCHITECTURE TEST OF SIMPLE_CALC_TB
www.eeworm.com/read/272824/10942844
cpp p4-190.cpp
#include
#include
#include
using namespace std;
//创建一个list容器的实例LISTINT，其存放int型数据
typedef list LISTINT;
void main(void)
{
//用LISTINT创建一个名为listOne的list对象
www.eeworm.com/read/468781/6988430
vhd multiplier_8_bit_tb.vhd
--
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
ENTITY multiplier_8_bit_tb IS
END multiplier_8_bit_tb;
www.eeworm.com/read/462646/7198885
vhd sim1.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;
USE ieee.numeric_std.ALL;
USE ieee.math_real.ALL;
ENTITY sim1_vhd IS
END sim1_vhd;
ARCHITECTURE behavior OF s
www.eeworm.com/read/450719/7477592
vhd cordic.vhd
--Generated by genEntity.pl Report Problems to aviral.mittal@intel.com
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE WORK.fun_pkg.ALL;
USE ieee.numeric_std.ALL;
use ieee.std_logic_arith.all;
USE IEEE