代码搜索：Numeric
找到约 7,754 项符合「Numeric」的源代码
代码结果 7,754
www.eeworm.com/read/421049/10758892
bak my_component.vhd.bak
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity my_component is
generic ( array_size: positive =2);
port( clk: in std_logic;
rst: in std_logic;
www.eeworm.com/read/274168/10886532
vhd memtest.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use WORK.common.all;
use WORK.rand.all;
package mem is
component memTest
generic(
DATA_WIDTH : natura
www.eeworm.com/read/274168/10886542
vhd atacntl.vhd
library IEEE, UNISIM;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.numeric_std.all;
use WORK.common.all;
package ata is
component pioIntfc
generic(
FRE
www.eeworm.com/read/273840/10899166
vhm uart4.vhm
--
-- Written by Synplicity
-- Fri Jul 07 14:16:33 2006
--
-- No definition of black box LUCENT.CCU2.PRIM
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library syn
www.eeworm.com/read/271074/11009509
vhd analyser.vhd
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.Constants.all;
entity Analyser is
port (reset, clk : in std_logic;
analyse : in std_logic;
store : in std
www.eeworm.com/read/468104/6999816
vhd counter.vhd
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
entity counter is
generic(counter_end : integer);
port (
clk : in std_logic;
counter_out : out integer
);
end counter;
www.eeworm.com/read/462646/7198834
txt retail de vhdl.txt
entity filtro is --Generic sirve para definir constantes...
port( clk in std_logic
reset in std_logic
din in std_logic_vector
dout out std_logic_vector
)
use ieee.numeric_std.all
www.eeworm.com/read/452710/7435884
h user.h
/* user.h */
struct user {
unsigned int ue_uid; /* numeric user identifier */
char *ue_login; /* user's login name */
char *ue_name; /* users real name */
char *ue_passwd; /* users en
www.eeworm.com/read/443723/7624746
vhd memtest.vhd
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use WORK.common.all;
use WORK.rand.all;
package mem is
component memTest
generic(
DATA_WIDTH : natura
www.eeworm.com/read/443723/7624748
vhd atacntl.vhd
library IEEE, UNISIM;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.numeric_std.all;
use WORK.common.all;
package ata is
component pioIntfc
generic(
FRE