代码搜索：Key
找到约 10,000 项符合「Key」的源代码
代码结果 10,000
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ngd vga_key.ngd
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edn vga_key.edn
(edif vga_key
(edifVersion 2 0 0)
(edifLevel 0)
(keywordMap (keywordLevel 0))
(status
(written
(timeStamp 2008 5 3 16 18 17)
(author "Synplicity, Inc.")
(program
www.eeworm.com/read/316087/13530532
v key_display.v
`timescale 1ns / 1ps
module key_display(clk, rst, button, seven, an,bn2,bn3);
input clk;
input rst;
input [3:0] button;
output [6:0] seven;
output [3:0] an;
output [3:0] b
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ncd vga_key.ncd
XILINX-XDB 0.1 STUB 0.1 ASCII
XILINX-XDM V1.4
###4904:XlxV32DM 3fbb 1310eNqtW2tz3LYV/SuaTL5WIi5AABQ/kfuAd7RaKLsrR5pMhyNLcuNpY6d+pHXrH1+AIFc8i+u2ijPjJXAugXOfJK/I5PtHe/dvIervt4+/vfnw5t3b8xNxKszJ91
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srd vga_key.srd
f "noname"; #file 0
f "d:\program files\synplicity\fpga_81\lib\xilinx\unisim.v"; #file 1
f "d:\program files\synplicity\fpga_81\bin\..\lib\xilinx\unisim.v"; #file 2
f "f:\basys\basys\huanyizuoyi17\
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srs vga_key.srs
#
#
#
# Created by Synplify Verilog HDL Compiler version 3.1.0, Build 049R from Synplicity, Inc.
# Copyright 1994-2004 Synplicity, Inc. , All rights reserved.
# Synthesis Netlist written on Sat M
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bgn vga_key.bgn
Release 8.2i - Bitgen I.31
Copyright (c) 1995-2006 Xilinx, Inc. All rights reserved.
Loading device for application Rf_Device from file '3s100e.nph' in environment
D:\Xilinx.
"vga_key" is an NCD,
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sdc vga_key.sdc
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