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-- Copyright (C) 1991-2005 Altera Corporation -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any o

Flow Status : Successful - Sat Jul 29 11:10:21 2006 Quartus II Version : 5.0 Build 171 11/03/2005 SP 2 SJ Full Version Revision Name : ram_control Top-level Entity Name : ram_control Family : Cycl

{E:/farsight_fpga_course/code/high/onchip ram/quartus/simulation/modelsim/cyclone_atoms.v} {1 {vlog -work work -vlog01compat {E:/farsight_fpga_course/code/high/onchip ram/quartus/simulation/modelsim/c

vendor_name = ModelSim source_file = 1, E:/farsight_fpga_course/code/high/onchip ram/quartus/RAM_36.v source_file = 1, E:/farsight_fpga_course/code/high/onchip ram/quartus/ram_control.v source_file

// Copyright (C) 1991-2005 Altera Corporation // Your use of Altera Corporation's design tools, logic functions // and other software and tools, and its AMPP partner logic // functions, and

Analysis & Synthesis report for ram_control Sat Jul 29 11:10:13 2006 Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version --------------------- ; Table of Contents ; --------------

Assembler report for ram_control Sat Jul 29 11:10:25 2006 Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version --------------------- ; Table of Contents ; ---------------------

Timing Analyzer report for ram_control Sat Jul 29 11:10:27 2006 Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version --------------------- ; Table of Contents ; -------------------

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II " "Info: Ru

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3} { "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Runni