代码搜索：Carry
找到约 8,060 项符合「Carry」的源代码
代码结果 8,060
www.eeworm.com/read/398133/8004252
vhd freq.vhd
--CNT10.VHD
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY CNT10 IS
PORT(CLK:IN STD_LOGIC;
CLR:IN STD_LOGIC;
ENA:IN STD_LOGIC;
CQ:OUT INTEGER RANGE 0 TO 15;
CARRY_OUT:OU
www.eeworm.com/read/157129/11738289
txt eclock.txt
library ieee;
use ieee.std_logic_1164.all;
package my_pkg is
component div1024
port(clk: in std_logic;
f1hz: out std_logic);
end component;
component count60
port(carry: in std_logic;
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vhd count60.vhd
Library IEEE;
Use IEEE.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use IEEE.std_logic_arith.all;
Entity count60 is
Port(carry: in std_logic;--from 1Hz input clock or the full_index of
www.eeworm.com/read/13816/283933
vhd count24.vhd
Library IEEE;
Use IEEE.std_logic_1164.all;
Use ieee.std_logic_unsigned.all;
Use IEEE.std_logic_arith.all;
Entity count24 is
Port(carry: in std_logic;--from 1Hz input clock or the full_index of
www.eeworm.com/read/18610/797067
vhd div.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY div10 IS
PORT(clk:IN STD_ULOGIC;
carry1:OUT STD_ULOGIC
);
END div10;
ARCHITECTURE rtl OF div10 IS
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vhd div10.vhd
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY div10 IS
PORT(clk:IN STD_ULOGIC;
carry1:OUT STD_ULOGIC
);
END div10;
ARCHITECTURE rtl OF div10 IS
SIGNAL ca:STD_ULOGIC;
BEG
www.eeworm.com/read/479931/1325887
cgs subxicc.cgs
# frv testcase for subxicc $GRi,$GRj,$GRk,$ICCi_1
# mach: all
.include "testutils.inc"
start
.global subxicc
subxicc:
set_gr_immed 2,gr8
set_icc 0x0e,0 ; Make sure carry is off
su
www.eeworm.com/read/479931/1326418
cgs subxi.cgs
# frv testcase for subxi $GRi,$GRj,$GRk,$ICCi_1
# mach: all
.include "testutils.inc"
start
.global subxi
subxi:
set_gr_immed 2,gr8
set_icc 0x0e,0 ; Make sure carry is off
subxi
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ms mulv10.ms
# mach: crisv8 crisv10
# output: fffffffe\n
# output: ffffffff\n
# output: fffffffe\n
# output: 1\n
; Check that carry is cleared on v8, v10.
.include "testutils.inc"
start
moveq -1,r3
moveq 2,r
www.eeworm.com/read/410728/2202543
cgs subxicc.cgs
# frv testcase for subxicc $GRi,$GRj,$GRk,$ICCi_1
# mach: all
.include "testutils.inc"
start
.global subxicc
subxicc:
set_gr_immed 2,gr8
set_icc 0x0e,0 ; Make sure carry is off
su