代码搜索：Booth
找到约 978 项符合「Booth」的源代码
代码结果 978
www.eeworm.com/read/355936/10241139
v booth_mult_tb.v
`timescale 10ns/100ps
module booth_mult_booth_mult_tb_v_tf();
// DATE: 10:49:51 04/06/2005
// MODULE: booth_mult
// DESIGN: booth_mult
// FILENAME: booth_mult_tb.v
// PROJECT: mul
www.eeworm.com/read/430918/8719119
v booth_multiplier.v
`include "parameters.h"
module booth_multiplier ( Result , Xin, Yin );
input [`X_WIDTH - 1 :0 ] Xin;
input [`Y_WIDTH - 1 :0 ] Yin;
output [`X_WIDTH + `Y_WIDTH - 1 : 0] Result;
reg [`X_WIDTH + `Y_WID
www.eeworm.com/read/383505/8941200
mpf booth16.mpf
[Library]
std = $MODEL_TECH/../std
ieee = $MODEL_TECH/../ieee
verilog = $MODEL_TECH/../verilog
std_developerskit = $MODEL_TECH/../std_developerskit
synopsys = $MODEL_TECH/../synopsys
modelsim_li
www.eeworm.com/read/383505/8941214
v booth16.v
module Booth16(CLK, RESET, A, B, P);
parameter WIDTH = 16;
input CLK, RESET;
input [WIDTH-1:0]A, B;
output [WIDTH+WIDTH-1:0]P;
reg [WIDTH+WIDTH-1:0]P;
reg [WIDTH-1:0]Count;
reg [WIDT
www.eeworm.com/read/379944/9171777
v testbench_booth.v
/////////////////////////////////////////////////////////////
// Verilog Test Bench v2.0, 3-29-2000 //
// ECE 371 EMR, Spring 2000 //
// By Steve B
www.eeworm.com/read/379944/9171839
out test_booth.out
Multiplier Test Log
___________________
Test# 1 run without incident.
================
Multiplier_A=00000020 Multiplier_B=00000100 Multiplier_Result=00002000 Expected_Result=00002000
========
www.eeworm.com/read/174989/9565748
mti booth.cr.mti
D:/HDLDesign/Lab0/fulladder32.vhd {1 {vcom -work work -2002 -explicit D:/HDLDesign/Lab0/fulladder32.vhd
Model Technology ModelSim SE vcom 6.0 Compiler 2004.08 Aug 19 2004
-- Loading package standard
www.eeworm.com/read/164962/10080411
txt multiplier_booth.txt
-- Booth Multiplier
-- This file contains all the entity-architectures for a complete
-- k-bit x k-bit Booth multiplier.
-- the design makes use of the new shift operators available in the VHDL-93
www.eeworm.com/read/355936/10241167
v booth_mult.v
module booth_mult(x,y,p);
input [7:0] x;
input [7:0] y;
output [14:0] p;
wire [14:0] p0 = 15'b0;
wire [14:0] p1;
wire [12:0] p2;
wire [10:0] p3;
wire [8:0] p4;
w
www.eeworm.com/read/353698/10431026
v booth_mul.v
//---------------------------------------
// Lib : boothmul
// Unit : Booth_Mul
//---------------------------------------
module Booth_Mul(M, Q, contrl, Ready, A);
input [31:0] M;
input [31:0] Q