搜索结果
找到约 15 项符合
XINLIX 的查询结果
VHDL/FPGA/Verilog UART参考设计带缓存用于Xinlix用于FPGA
UART参考设计带缓存用于Xinlix用于FPGA
教程资料 Xinlix ISE快速入门详细教程_青山紫木原创
这是一篇很好的ISE入门资料，花了本人3个小时才写完。对新手来说，只要按本文走，10分钟就可以入门。
可编程逻辑 Xinlix ISE快速入门详细教程_青山紫木原创
这是一篇很好的ISE入门资料，花了本人3个小时才写完。对新手来说，只要按本文走，10分钟就可以入门。
VHDL/FPGA/Verilog it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8
it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is required.
VHDL/FPGA/Verilog 此为在xinlix系统上开发的PS通信程序
此为在xinlix系统上开发的PS通信程序，用VHDL语言开发
VHDL/FPGA/Verilog it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix
it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
VHDL/FPGA/Verilog it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have
it is a verilog code written for traffic light controller will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].it is a state machine based code.
软件设计/软件工程 该文档是有关利用XINLIX的FPGA如何实现FIFO的生成及如何应用的文章。
该文档是有关利用XINLIX的FPGA如何实现FIFO的生成及如何应用的文章。
嵌入式/单片机编程 sram 控制器的三种实现方案
sram 控制器的三种实现方案，来自xinlix工程师之手，不可多得
VHDL/FPGA/Verilog it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in x
it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.