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可编程逻辑 Creating Safe State Machines(Mentor)
 
Finite state machines are widely used in digital circuit designs. Generally, when designing a state machine using an HDL, the synthesis tools will optimize away all states that cannot be reached and generate a highly optimized circuit. Sometimes, however, the optimization is not acceptabl ...
技术资料 DDS原理.rar
直接数字合成（Direct Digital Synthesis、DDS）是一种新的频率合成技术和信号产生的方法。直接数字频率合成器(DDS)具有超高速的频率转换时间，极高的频率分辨率和较低的相位噪声，在频率改变与调频时，DDS能够保持相位的连续，因此很容易实现频率、相位和幅度调制 ...
通讯编程文档 With the advent of multimedia, digital signal processing (DSP) of sound has emerged from the shadow
With the advent of multimedia, digital signal processing (DSP) of sound has emerged from the shadow of bandwidth-limited speech processing. Today, the main appli- cations of audio DSP are high quality audio coding and the digital generation and manipulation of music signals. They share common resear ...
技术资料 直接数字频率合成在软件无线电中的应用
· 摘要：  阐述了软件无线电技术(Software Radio),直接数字频率合成技术(Direct Digital Frequency Synthesis) 一般概念、基本原理及技术特点,并介绍了直接数字频率合成技术在软件无线电中的一些应用,初步提供了一种DSP+DDS实现基于软件无线电的多制式信号发生器方案.      ...
Modem编程 Make and answer phone calls Detect tone and pulse digit from the phone line Capture Caller ID
Make and answer phone calls
Detect tone and pulse digit from the phone line
Capture Caller ID
Support blind transfer, single-step transfer/conference, consultation transfer/conference, hold, unhold.
Control of the local phone handset, microphone and speaker of the modem
Send and receive fa ...
VHDL/FPGA/Verilog DDR SDRAM控制器的VHDL源代码
DDR SDRAM控制器的VHDL源代码，含详细设计文档。
The DDR, DCM, and SelectI/O&#8482 features in the Virtex&#8482 -II architecture make it the perfect
choice for implementing a controller of a Double Data Rate (DDR) SDRAM. The Digital Clock
Manager (DCM) provides the required Delay Locked Loop (DLL), Dig ...
技术资料 合成孔径雷达成像处理器数据传输与互连技术
· 摘要：  数据传输与互连技术是合成孔径雷达(Synthesis Aperture Radar,简写为SAR)实时成像处理系统设计的关键技术之一.本文将当前的数据传输与互连技术分成基于网络、总线、交叉开关和专用技术等4类,分析了性能,并讨论了未来互连技术的发展方向.在此基础上,结合SAR信号处理的需求,提出了基于数据帧结构的通用 ...
其他书籍 关于FPGA流水线设计的论文 This work investigates the use of very deep pipelines for implementing circuits in
关于FPGA流水线设计的论文
This work investigates the use of very deep pipelines for
implementing circuits in FPGAs, where each pipeline
stage is limited to a single FPGA logic element (LE). The
architecture and VHDL design of a parameterized integer
array multiplier is presented and also an IEEE 754
...
BREW编程 ECE345, Visual-to-Audio Electronic Travel Aid Code for TM320C54x (v2a.asm) download This project
ECE345, Visual-to-Audio Electronic Travel Aid
Code for TM320C54x (v2a.asm) download
This project involves the design and implementation of a audio synthesis device that converts moving images into audio signals. The system is built on a TM320C54x DSP with interface to an IMAQ camera module via the ...
系统设计方案 本系统分电压测量和信号产生输出两大部分
本系统分电压测量和信号产生输出两大部分，电压测量部分以模拟电路为主，配合放大模块、A/D转化模块、显示模块；通过凌阳单片机进行数据处理，在误差允许范围内显示测量电压值。信号产生以直接数字式频率合成器(Direct Digital Frequency Synthesis,简称DDS或DDFS)为核心，经过AT89S52对DDS芯片内部进行控制，使之输出标准 ...