搜索：PLL - 虫虫下载站

微处理器开发  DP256_HCS12_PLL锁相环驱动程序

DP256_HCS12_PLL锁相环驱动程序

https://www.eeworm.com/dl/655/275645.html

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微处理器开发  ZLG的SMARTARM2300开发板的pll源程序。

ZLG的SMARTARM2300开发板的pll源程序。

https://www.eeworm.com/dl/655/340963.html

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SMARTARM 2300 ZLG pll

微处理器开发  这个是三星arm9芯片的PLL源码

这个是三星arm9芯片的PLL源码，不可多得啊

https://www.eeworm.com/dl/655/347886.html

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arm9 PLL 三星芯片

电子书籍  PhD.thesis about fractional PLL design from UC san-deago.

PhD.thesis about fractional PLL design from UC san-deago.

https://www.eeworm.com/dl/cadence/ebook/364352.html

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fractional san-deago thesis design

通讯/手机编程  MC33493 - PLL tuned UHF Transmitter for Data Transfer Applications - Motorola, Inc

MC33493 - PLL tuned UHF Transmitter for Data Transfer Applications - Motorola, Inc

https://www.eeworm.com/dl/527/465049.html

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Applications Transmitter Motorola Transfer

技术资料  基于VXI总线用DDS+PLL技术实现精密时钟源

DDS（直接数字频率合成）技术是一门在频率合成领域的新兴技术，具有响应时间短，精度高等优点。而PLL（Phase Locked Loop）锁相环技术虽然工作速度慢，但稳定可靠。VXI 总线具有

https://www.eeworm.com/dl/921590.html

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Locked Phase Loop

技术资料  04 calgary PhD Improving Tracking Performance of PLL in High Dynamic Applications.pdf

资料->【E】光盘论文->【E1】斯坦福博士论文->04 calgary PhD Improving Tracking Performance of PLL in High Dynamic Applications.pdf

https://www.eeworm.com/dl/950889.html

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Applications Performance Improving

通讯/手机编程  基于FPGA的新的DDS+PLL时钟发生器

基于FPGA的新的DDS+PLL时钟发生器

https://www.eeworm.com/dl/527/184991.html

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FPGA DDS PLL 时钟发生器

通讯/手机编程  Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides

Cypress Semiconductor makes a variety of PLL-based clock generators. This application note provides a set of recommendations to optimize usage of Cypress clock devices in a system. The application note begins with recommended termination techniques for clock generators. Subsequently, power supply fi ...

https://www.eeworm.com/dl/527/228953.html

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Semiconductor application generators PLL-based

单片机开发  一个程控锁相环PLL程序,可以设定频率,步进

一个程控锁相环PLL程序,可以设定频率,步进

https://www.eeworm.com/dl/648/239594.html

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PLL 程控程序步进

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