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技术资料 Verilog的135个经典设计 实例

【例3.1]4位全加器module adder 4(cout,sum i na,i nb,cin);output[3:0]sum output cout;input[3:0]i na,i nb;input cin;assign(cout,suml=i na +i nb+ci n;endmodule【例3.2]4位计数器module count 4(out,reset,clk);output[3:0]out;input reset,cl k;regl 3:01 out;always@posedge clk) ...
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技术资料 The_Circuit_Designer’s_Companion(Second_edition)

1. A lots of comprehensive drawing, most of them are dummy-proof. 2. Very good content structure, one can start from any chapter without difficulty. It is easy to finds what he want. 3. Easy English (OK, okay, I am from Taiwan). No riddle-like description. Always has some explaination when refer t ...
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模拟电子 模拟IC性能的权衡 模拟到数字化设计的挑战

Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have internalvoltage references, analog-to-digital converters (ADCs) or digital-to-analog converters (DACs). How ...
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文件格式 Rao-Blackwellised Particle Filters (RBPFs) are a class of Particle Filters (PFs) that exploit condi

Rao-Blackwellised Particle Filters (RBPFs) are a class of Particle Filters (PFs) that exploit conditional dependencies between parts of the state to estimate. By doing so, RBPFs can improve the estimation quality while also reducing the overall computational load in comparison to original PFs. Howev ...
https://www.eeworm.com/dl/639/241532.html
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微处理器开发 D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger Description A 32 byte block from 22

D169 Demo - DMA0 Repeated Burst to-from RAM, Software Trigger Description A 32 byte block from 220h-240h is transfered to 240h-260h using DMA0 in a burst block using software DMAREQ trigger. After each transfer, source, destination and DMA size are reset to inital software setting because DMA tran ...
https://www.eeworm.com/dl/655/336955.html
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单片机编程 FREERTOS的官方移植文档

FeaturesThe following standard features are provided.• Choice of RTOS scheduling policy1. Pre-emptive:Always runs the highest available task. Tasks of identical priorityshare CPU time (fully pre-emptive with round robin time slicing).2. Cooperative:Context switches only occur if a task blocks, ...
https://www.eeworm.com/dl/502/30820.html
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VHDL/FPGA/Verilog 三种16位整数运算器的ALU设计方法

三种16位整数运算器的ALU设计方法,调用库函数74181(4位ALU),组成串行16位运算器。(用74181的正逻辑) B.调用库函数74181和74182,组成提前进位16位运算器。(用74181的正逻辑) 注意:调74181库设计,加进位是“0”有效,减借位是“1”有效,所以最高位进位或借位标志寄存器要统一调整到高有效 C.用always @,case方式 ...
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FlashMX/Flex源码 I ll probably write up a short article next week outlining how the ActionScript works, so people can

I ll probably write up a short article next week outlining how the ActionScript works, so people can modify it, and work with it more easily in Flex. You can download the component and source code here. There are some instructions in the FLA on how to use it. Note that this is not a compiled compo ...
https://www.eeworm.com/dl/661/429921.html
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软件设计/软件工程 Just what is a regular expression, anyway? Take the tutorial to get the long answer. The short answ

Just what is a regular expression, anyway? Take the tutorial to get the long answer. The short answer is that a regular expression is a compact way of describing complex patterns in texts. You can use them to search for patterns and, once found, to modify the patterns in complex ways. You can also u ...
https://www.eeworm.com/dl/684/277340.html
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其他书籍 The combinatorial core of the OVSF code assignment problem that arises in UMTS is to assign some no

The combinatorial core of the OVSF code assignment problem that arises in UMTS is to assign some nodes of a complete binary tree of height h (the code tree) to n simultaneous connections, such that no two assigned nodes (codes) are on the same root-to-leaf path. Each connection requires a code on a ...
https://www.eeworm.com/dl/542/396313.html
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