led.vhd

可以显示六个BCD码的动态扫描七段数码管显示电路。有缓存

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY led IS
PORT(
      clk:IN STD_LOGIC;
      ena:in std_logic_vector(5 downto 0);
      flicker_ena:in std_logic_vector(5 downto 0);
      data:in std_logic_vector(29 downto 0);
      ld:IN STD_LOGIC;
      sdata:in std_logic_vector(4 downto 0);
      addr:in std_logic_vector(2 downto 0);
      wr:IN STD_LOGIC;
      dout:out std_logic_vector(6 downto 0);
      
      dp:OUT STD_LOGIC);

END led;
ARCHITECTURE rtl OF led IS
component led_clk_gen
PORT(
      clk     :IN STD_LOGIC;
      clk_scan:BUFFER STD_LOGIC;
      CLK_FLICKER:OUT STD_LOGIC
);
END component;


component ledscan1
PORT(
     clk_scan:IN STD_LOGIC;
     ledaddr :OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
     ledsel  :OUT STD_LOGIC_VECTOR(5 DOWNTO 0));
END component;

component ledmux
PORT(
    datain  :IN  STD_LOGIC_VECTOR(29 DOWNTO 0);
    ledaddr :IN  STD_LOGIC_VECTOR(2 DOWNTO 0);
    dataout :OUT STD_LOGIC_VECTOR(4 DOWNTO 0));
END component;
component led_flicker
PORT(
   ena    :IN STD_LOGIC_VECTOR(5 DOWNTO 0);
   flicker_ena :IN STD_LOGIC_VECTOR(5 DOWNTO 0);
   addr      :IN STD_LOGIC_VECTOR(2 DOWNTO 0);
   din       :IN STD_LOGIC_VECTOR(6 DOWNTO 0);
   dp        :IN STD_LOGIC;
   clk_flicker: IN STD_LOGIC;
   dout      :OUT STD_LOGIC_VECTOR(6 DOWNTO 0);
   dpout     :OUT STD_LOGIC);
END component;
component decoder7
port(
bcd:in std_logic_vector(3 downto 0);
dout:out std_logic_vector(6 downto 0));
end component;
component disp_buf
PORT(
    clk   :IN STD_LOGIC;
    ld    :IN STD_LOGIC;
    data  :IN STD_LOGIC_VECTOR(29 DOWNTO 0);
    addr  :IN STD_LOGIC_VECTOR(2 DOWNTO 0);
    sdata :IN STD_LOGIC_VECTOR(4 DOWNTO 0);
    wr    :IN STD_LOGIC;
    dataout:OUT STD_LOGIC_VECTOR(29 DOWNTO 0));
end component;

SIGNAL clk_scan,clk_flicker:std_logic;
SIGNAL ledaddr:STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL ledsel:STD_LOGIC_VECTOR(5 DOWNTO 0);
SIGNAL buf_output:STD_LOGIC_VECTOR(29 DOWNTO 0);
SIGNAL mux_output:STD_LOGIC_VECTOR(4 DOWNTO 0);
SIGNAL decoder_output:STD_LOGIC_VECTOR(6 DOWNTO 0);
BEGIN
clk_gen1:led_clk_gen
port map(clk=>clk,
clk_scan=>clk_scan,
clk_flicker=>CLK_FLICKER);
ledscan2:ledscan1
port map(clk_scan=>clk_scan,
ledaddr=>ledaddr,
ledsel=>ledsel	);
ledmux1:ledmux
port map(datain=>buf_output,
ledaddr=>ledaddr,
dataout=>mux_output);
ledflicker1:led_flicker
port map(ena=>ena,
flicker_ena=>flicker_ena,
addr=>ledaddr,
din=>decoder_output,
dp=>mux_output(4),
clk_flicker=>clk_flicker,
dout=>dout,
dpout=>dp);
decoder71:decoder7
port map(bcd=>mux_output(3 downto 0),
dout=>decoder_output);
dis_buf1:disp_buf
port map(clk=>clk,
data=>data,
ld=>ld,
sdata=>sdata,
addr=>addr,
wr=>wr,
dataout=>buf_output);
end rtl;