ledscan1.vhd

来自「可以显示六个BCD码的动态扫描七段数码管显示电路。有缓存」· VHDL 代码 · 共 36 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY ledscan1 IS
PORT(
     clk_scan:IN STD_LOGIC;
     ledaddr :OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
     ledsel  :OUT STD_LOGIC_VECTOR(5 DOWNTO 0));
END ledscan1;
ARCHITECTURE rtl OF ledscan1 IS
SIGNAL cnt :INTEGER RANGE 0 TO 5;
BEGIN
PROCESS(clk_scan)
BEGIN
   IF(clk_scan'event AND clk_scan='1')THEN
       IF(cnt=cnt'high)THEN
           cnt<=0;
ELSE
      cnt<=cnt+1;
END IF;
END IF;
END PROCESS;
ledaddr<=CONV_STD_LOGIC_VECTOR(cnt,3);
PROCESS(cnt)
BEGIN
    CASE cnt IS
       WHEN 0=>ledsel<="000001";
       WHEN 1=>ledsel<="000010";
       WHEN 2=>ledsel<="000100";
       WHEN 3=>ledsel<="001000";
       WHEN 4=>ledsel<="010000";
       WHEN 5=>ledsel<="100000";
       WHEN OTHERS=>ledsel<="000001";
END CASE;
END PROCESS;
END rtl;