led_flicker.vhd

来自「可以显示六个BCD码的动态扫描七段数码管显示电路。有缓存」· VHDL 代码 · 共 57 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY led_flicker IS
PORT(
   ena    :IN STD_LOGIC_VECTOR(5 DOWNTO 0);
   flicker_ena :IN STD_LOGIC_VECTOR(5 DOWNTO 0);
   addr      :IN STD_LOGIC_VECTOR(2 DOWNTO 0);
   din       :IN STD_LOGIC_VECTOR(6 DOWNTO 0);
   dp        :IN STD_LOGIC;
   clk_flicker: IN STD_LOGIC;
   dout      :OUT STD_LOGIC_VECTOR(6 DOWNTO 0);
   dpout     :OUT STD_LOGIC);
END led_flicker;
ARCHITECTURE rtl OF led_flicker IS
SIGNAL ena_bit :STD_LOGIC;
SIGNAL flicker_ena_bit:STD_LOGIC;
BEGIN
  PROCESS(ena,flicker_ena,addr)
BEGIN
CASE addr IS
     WHEN "000"=>ena_bit<=ena(0);
                flicker_ena_bit<=flicker_ena(0);
     WHEN "001"=>ena_bit<=ena(1);
                flicker_ena_bit<=flicker_ena(1);
     WHEN "010"=>ena_bit<=ena(2);
                flicker_ena_bit<=flicker_ena(2);
     WHEN "011"=>ena_bit<=ena(3);
                flicker_ena_bit<=flicker_ena(3);
     WHEN "100"=>ena_bit<=ena(4);
                flicker_ena_bit<=flicker_ena(4);
     WHEN "101"=>ena_bit<=ena(5);
                flicker_ena_bit<=flicker_ena(5);
     WHEN OTHERS=>ena_bit<='0';
                flicker_ena_bit<='0';
END CASE;
END PROCESS;
PROCESS(ena_bit,flicker_ena_bit,din,dp,clk_flicker)
BEGIN
IF(ena_bit='1')THEN
IF(flicker_ena_bit='1')THEN
IF(clk_flicker='1')THEN
dout<=din;
dpout<=dp;
ELSE
dout<="0000000";
dpout<='0';
END IF;
ELSE
dout<=din;
dpout<=dp;
END IF;
ELSE
dout<="0000000";
dpout<='0';
END IF;
END PROCESS;
END rtl;