📄 ledmux.vhd
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY ledmux IS
PORT(
datain :IN STD_LOGIC_VECTOR(29 DOWNTO 0);
ledaddr :IN STD_LOGIC_VECTOR(2 DOWNTO 0);
dataout :OUT STD_LOGIC_VECTOR(4 DOWNTO 0));
END ledmux;
ARCHITECTURE rtl OF ledmux IS
BEGIN
PROCESS(datain,ledaddr)
BEGIN
CASE ledaddr IS
WHEN "000"=>dataout<=datain(4 DOWNTO 0);
WHEN "001"=>dataout<=datain(9 DOWNTO 5);
WHEN "010"=>dataout<=datain(14 DOWNTO 10);
WHEN "011"=>dataout<=datain(19 DOWNTO 15);WHEN "100"=>dataout<=datain(24 DOWNTO 20);WHEN "101"=>dataout<=datain(29 DOWNTO 25);
WHEN OTHERS=>null;
END CASE;
END PROCESS;
END rtl;
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