📄 rciii.fit.qmsg
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{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "35 " "Warning: Found 35 output pins without output pin load capacitance assignment" { { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_CE 0 " "Warning: Pin \"FLASH_CE\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_OE 0 " "Warning: Pin \"FLASH_OE\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_RW 0 " "Warning: Pin \"FLASH_RW\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[23\] 0 " "Warning: Pin \"FLASH_A\[23\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[22\] 0 " "Warning: Pin \"FLASH_A\[22\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[21\] 0 " "Warning: Pin \"FLASH_A\[21\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[20\] 0 " "Warning: Pin \"FLASH_A\[20\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[19\] 0 " "Warning: Pin \"FLASH_A\[19\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[18\] 0 " "Warning: Pin \"FLASH_A\[18\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[17\] 0 " "Warning: Pin \"FLASH_A\[17\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[16\] 0 " "Warning: Pin \"FLASH_A\[16\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[15\] 0 " "Warning: Pin \"FLASH_A\[15\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[14\] 0 " "Warning: Pin \"FLASH_A\[14\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[13\] 0 " "Warning: Pin \"FLASH_A\[13\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[12\] 0 " "Warning: Pin \"FLASH_A\[12\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[11\] 0 " "Warning: Pin \"FLASH_A\[11\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[10\] 0 " "Warning: Pin \"FLASH_A\[10\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[9\] 0 " "Warning: Pin \"FLASH_A\[9\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[8\] 0 " "Warning: Pin \"FLASH_A\[8\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[7\] 0 " "Warning: Pin \"FLASH_A\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[6\] 0 " "Warning: Pin \"FLASH_A\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[5\] 0 " "Warning: Pin \"FLASH_A\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[4\] 0 " "Warning: Pin \"FLASH_A\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[3\] 0 " "Warning: Pin \"FLASH_A\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[2\] 0 " "Warning: Pin \"FLASH_A\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[1\] 0 " "Warning: Pin \"FLASH_A\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[0\] 0 " "Warning: Pin \"FLASH_A\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[7\] 0 " "Warning: Pin \"FLASH_D\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[6\] 0 " "Warning: Pin \"FLASH_D\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[5\] 0 " "Warning: Pin \"FLASH_D\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[4\] 0 " "Warning: Pin \"FLASH_D\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[3\] 0 " "Warning: Pin \"FLASH_D\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[2\] 0 " "Warning: Pin \"FLASH_D\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[1\] 0 " "Warning: Pin \"FLASH_D\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[0\] 0 " "Warning: Pin \"FLASH_D\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} } { } 0}
{ "Warning" "WDAT_NO_LOADING_SPECIFIED_ONE_OR_MORE_PINS" "35 " "Warning: Found 35 output pins without output pin load capacitance assignment" { { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_CE 0 " "Warning: Pin \"FLASH_CE\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_OE 0 " "Warning: Pin \"FLASH_OE\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_RW 0 " "Warning: Pin \"FLASH_RW\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[23\] 0 " "Warning: Pin \"FLASH_A\[23\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[22\] 0 " "Warning: Pin \"FLASH_A\[22\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[21\] 0 " "Warning: Pin \"FLASH_A\[21\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[20\] 0 " "Warning: Pin \"FLASH_A\[20\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[19\] 0 " "Warning: Pin \"FLASH_A\[19\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[18\] 0 " "Warning: Pin \"FLASH_A\[18\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[17\] 0 " "Warning: Pin \"FLASH_A\[17\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[16\] 0 " "Warning: Pin \"FLASH_A\[16\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[15\] 0 " "Warning: Pin \"FLASH_A\[15\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[14\] 0 " "Warning: Pin \"FLASH_A\[14\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[13\] 0 " "Warning: Pin \"FLASH_A\[13\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[12\] 0 " "Warning: Pin \"FLASH_A\[12\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[11\] 0 " "Warning: Pin \"FLASH_A\[11\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[10\] 0 " "Warning: Pin \"FLASH_A\[10\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[9\] 0 " "Warning: Pin \"FLASH_A\[9\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[8\] 0 " "Warning: Pin \"FLASH_A\[8\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[7\] 0 " "Warning: Pin \"FLASH_A\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[6\] 0 " "Warning: Pin \"FLASH_A\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[5\] 0 " "Warning: Pin \"FLASH_A\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[4\] 0 " "Warning: Pin \"FLASH_A\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[3\] 0 " "Warning: Pin \"FLASH_A\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[2\] 0 " "Warning: Pin \"FLASH_A\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[1\] 0 " "Warning: Pin \"FLASH_A\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_A\[0\] 0 " "Warning: Pin \"FLASH_A\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[7\] 0 " "Warning: Pin \"FLASH_D\[7\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[6\] 0 " "Warning: Pin \"FLASH_D\[6\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[5\] 0 " "Warning: Pin \"FLASH_D\[5\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[4\] 0 " "Warning: Pin \"FLASH_D\[4\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[3\] 0 " "Warning: Pin \"FLASH_D\[3\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[2\] 0 " "Warning: Pin \"FLASH_D\[2\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[1\] 0 " "Warning: Pin \"FLASH_D\[1\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} { "Warning" "WDAT_NO_LOADING_SPECIFIED_ON_PIN" "FLASH_D\[0\] 0 " "Warning: Pin \"FLASH_D\[0\]\" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis" { } { } 0} } { } 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "rcIII:inst\|rcIII_reset_clk_domain_synch_module:rcIII_reset_clk_domain_synch\|data_out~clkctrl " "Info: Node rcIII:inst\|rcIII_reset_clk_domain_synch_module:rcIII_reset_clk_domain_synch\|data_out~clkctrl uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[4\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[4\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[4] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[4\]" } } } } { "cpu_0.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/cpu_0.v" 565 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[4] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[3\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[3\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[3\]" } } } } { "cpu_0.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/cpu_0.v" 565 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[3] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[0\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[0\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[0] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[0\]" } } } } { "cpu_0.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/cpu_0.v" 565 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[0] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|cpu_0:the_cpu_0\|R_wr_dst_reg " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|cpu_0:the_cpu_0\|R_wr_dst_reg -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_wr_dst_reg } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|cpu_0:the_cpu_0\|R_wr_dst_reg" } } } } { "cpu_0.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/cpu_0.v" 579 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_wr_dst_reg } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[2\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[2\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[2\]" } } } } { "cpu_0.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/cpu_0.v" 565 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[2] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[1\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[1\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|cpu_0:the_cpu_0\|R_dst_regnum\[1\]" } } } } { "cpu_0.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/cpu_0.v" 565 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|cpu_0:the_cpu_0|R_dst_regnum[1] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|t_dav " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|t_dav -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|t_dav } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|t_dav" } } } } { "jtag_uart_0.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/jtag_uart_0.v" 539 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|t_dav } "NODE_NAME" } } } 0} } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|rcIII_reset_clk_domain_synch_module:rcIII_reset_clk_domain_synch|data_out~clkctrl } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|rcIII_reset_clk_domain_synch_module:rcIII_reset_clk_domain_synch\|data_out~clkctrl" } } } } { "rcIII.v" "" { Text "C:/altera/kits/nios2/components/rcIII/system/rcIII.v" 2973 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|rcIII_reset_clk_domain_synch_module:rcIII_reset_clk_domain_synch|data_out~clkctrl } "NODE_NAME" } } } 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "sld_hub:sld_hub_inst\|CLEAR_SIGNAL~0clkctrl " "Info: Node sld_hub:sld_hub_inst\|CLEAR_SIGNAL~0clkctrl uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[2\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[2\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[2\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 210 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[2] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[3\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[3\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[3\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 210 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[3] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[6\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[6\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[6] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[6\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 210 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[6] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[3\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[3\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[3] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[3\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 186 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[3] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[7\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[7\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[7\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 210 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[7] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[9\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[9\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[9\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 186 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[9] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[9\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[9\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[9\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 210 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[9] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[5\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[5\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[5] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[5\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 210 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[5] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[8\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[8\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[8] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[8\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 210 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|count[8] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[4\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[4\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[4] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[4\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 186 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[4] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[7\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[7\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[7] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[7\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 186 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[7] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[8\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[8\] -- routed using non-global resources" { } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[8] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|td_shift\[8\]" } } } } { "alt_jtag_atlantic.v" "" { Text "c:/altera/quartus50/libraries/megafunctions/alt_jtag_atlantic.v" 186 -1 0 } } { "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/rcIII.fld" "" "" { rcIII:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[8] } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[4\] " "Info: Port clear -- assigned as a global for destination node rcIII:inst\|jtag_uart_0:the_jtag_uart_0\|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic\|count\[4\] --
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