📄 rciii.hif
字号:
OFF
PARAMETER_UNKNOWN
USR
ALLOW_RWCYCLE_WHEN_FULL
OFF
PARAMETER_UNKNOWN
DEF
ADD_RAM_OUTPUT_REGISTER
OFF
PARAMETER_UNKNOWN
DEF
ALMOST_FULL_VALUE
0
PARAMETER_UNKNOWN
DEF
ALMOST_EMPTY_VALUE
0
PARAMETER_UNKNOWN
DEF
USE_EAB
ON
PARAMETER_UNKNOWN
USR
MAXIMIZE_SPEED
5
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
OPTIMIZE_FOR_SPEED
5
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
scfifo_j4p
PARAMETER_UNKNOWN
USR
}
# used_port {
clock
data
data
data
data
data
data
data
data
empty
full
q
q
q
q
q
q
q
q
rdreq
usedw
usedw
usedw
usedw
usedw
usedw
wrreq
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
c:|altera|quartus50|libraries|megafunctions|a_regfifo.inc
1107572164
c:|altera|quartus50|libraries|megafunctions|a_dpfifo.inc
1107571908
c:|altera|quartus50|libraries|megafunctions|a_i2fifo.inc
1107572036
c:|altera|quartus50|libraries|megafunctions|a_fffifo.inc
1107571974
c:|altera|quartus50|libraries|megafunctions|a_f2fifo.inc
1107571944
}
# end
# entity
alt_jtag_atlantic
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|alt_jtag_atlantic.v
1131032878
7
# storage
db|rcIII.(29).cnf
db|rcIII.(29).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
INSTANCE_ID
0
PARAMETER_DEC
USR
SLD_NODE_INFO
00001100000000000110111000000000
PARAMETER_BIN
DEF
LOG2_TXFIFO_DEPTH
6
PARAMETER_DEC
USR
LOG2_RXFIFO_DEPTH
6
PARAMETER_DEC
USR
RESERVED
0
PARAMETER_DEC
DEF
DATA_WIDTH
8
PARAMETER_DEC
DEF
NODE_IR_WIDTH
1
PARAMETER_DEC
DEF
SCAN_LENGTH
11
PARAMETER_DEC
DEF
}
# end
# entity
altsyncram
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|altsyncram.tdf
1114012438
6
# storage
db|rcIII.(32).cnf
db|rcIII.(32).cnf
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
SINGLE_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_DEC
USR
WIDTHAD_A
14
PARAMETER_DEC
USR
NUMWORDS_A
16384
PARAMETER_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
2
PARAMETER_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
M4K
PARAMETER_UNKNOWN
USR
BYTE_SIZE
8
PARAMETER_DEC
USR
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
USR
INIT_FILE
payload_buffer.hex
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_c311
PARAMETER_UNKNOWN
USR
}
# used_port {
address_a
address_a
address_a
address_a
address_a
address_a
address_a
address_a
address_a
address_a
address_a
address_a
address_a
address_a
byteena_a
byteena_a
clock0
clocken0
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
data_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
q_a
wren_a
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|stratix_ram_block.inc
1107575592
c:|altera|quartus50|libraries|megafunctions|lpm_mux.inc
1107574776
c:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
c:|altera|quartus50|libraries|megafunctions|altsyncram.inc
1107573506
c:|altera|quartus50|libraries|megafunctions|a_rdenreg.inc
1107572148
c:|altera|quartus50|libraries|megafunctions|altrom.inc
1107573422
c:|altera|quartus50|libraries|megafunctions|altram.inc
1107573384
c:|altera|quartus50|libraries|megafunctions|altdpram.inc
1107573082
c:|altera|quartus50|libraries|megafunctions|altqpram.inc
1107573362
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_counter.tdf
1131033074
6
# storage
db|rcIII.(42).cnf
db|rcIII.(42).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_vm8
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clock
cnt_en
cout
q
q
q
q
q
q
q
q
q
q
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|lpm_decode.inc
1107574570
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
c:|altera|quartus50|libraries|megafunctions|lpm_add_sub.inc
1107574408
c:|altera|quartus50|libraries|megafunctions|cmpconst.inc
1107573980
c:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
c:|altera|quartus50|libraries|megafunctions|lpm_counter.inc
1107574548
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter.inc
1107572664
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
c:|altera|quartus50|libraries|megafunctions|alt_synch_counter_f.inc
1107572680
c:|altera|quartus50|libraries|megafunctions|alt_counter_f10ke.inc
1107572320
c:|altera|quartus50|libraries|megafunctions|alt_counter_stratix.inc
1107572334
}
# end
# entity
sld_hub
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
4
# storage
db|rcIII.(44).cnf
db|rcIII.(44).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
2
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone II
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
4
PARAMETER_UNKNOWN
USR
node_info
00001100000000000110111000000000
PARAMETER_BIN
USR
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
}
# end
# entity
sld_jtag_state_machine
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
4
# storage
db|rcIII.(45).cnf
db|rcIII.(45).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
ip_major_version
1
PARAMETER_DEC
USR
ip_minor_version
2
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|sld_hub.vhd
1131032874
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_shiftreg.tdf
1114012454
6
# storage
db|rcIII.(46).cnf
db|rcIII.(46).cnf
# user_parameter {
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
enable
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
c:|altera|quartus50|libraries|megafunctions|dffeea.inc
1107574164
}
# end
# entity
lpm_decode
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|lpm_decode.tdf
1114012450
6
# storage
db|rcIII.(47).cnf
db|rcIII.(47).cnf
# user_parameter {
LPM_WIDTH
3
PARAMETER_DEC
USR
LPM_DECODES
8
PARAMETER_DEC
USR
LPM_PIPELINE
1
PARAMETER_DEC
USR
CASCADE_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone II
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
decode_rpe
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clken
clock
data0
data1
data2
enable
eq0
eq1
eq2
eq3
eq7
}
# include_file {
c:|altera|quartus50|libraries|megafunctions|aglobal50.inc
1131033050
c:|altera|quartus50|libraries|megafunctions|lpm_constant.inc
1107574524
c:|altera|quartus50|libraries|megafunctions|lpm_compare.inc
1107574500
c:|altera|quartus50|libraries|megafunctions|declut.inc
1107574136
c:|altera|quartus50|libraries|megafunctions|altshift.inc
1107573438
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_dffex.vhd
1131032874
4
# storage
db|rcIII.(49).cnf
db|rcIII.(49).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
1
PARAMETER_DEC
USR
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_dffex.vhd
1131032874
4
# storage
db|rcIII.(50).cnf
db|rcIII.(50).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
5
PARAMETER_DEC
USR
}
# end
# entity
sld_dffex
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_dffex.vhd
1131032874
4
# storage
db|rcIII.(51).cnf
db|rcIII.(51).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
size
4
PARAMETER_DEC
USR
}
# end
# entity
sld_rom_sr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|sld_rom_sr.vhd
1131032874
4
# storage
db|rcIII.(52).cnf
db|rcIII.(52).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
64
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
}
# end
# entity
altsyncram
# case_insensitive
# source_file
c:|altera|quartus50|libraries|megafunctions|altsyncram.tdf
1114012438
6
# storage
db|rcIII.(33).cnf
db|rcIII.(33).cnf
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
SINGLE_PORT
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_DEC
USR
WIDTHAD_A
13
PARAMETER_DEC
USR
NUMWORDS_A
8192
PARAMETER_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
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