rciii.tan.qmsg

niosII基础上实现的嵌入式网络驱动

{ "Info" "ITDB_FULL_TPD_RESULT" "altera_internal_jtag~TDO altera_reserved_tdo 2.901 ns Longest " "Info: Longest tpd from source pin \"altera_internal_jtag~TDO\" to destination pin \"altera_reserved_tdo\" is 2.901 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns altera_internal_jtag~TDO 1 PIN JTAG_X1_Y14_N0 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = JTAG_X1_Y14_N0; Fanout = 1; PIN Node = 'altera_internal_jtag~TDO'" {  } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.901 ns) 2.901 ns altera_reserved_tdo 2 PIN PIN_L5 0 " "Info: 2: + IC(0.000 ns) + CELL(2.901 ns) = 2.901 ns; Loc. = PIN_L5; Fanout = 0; PIN Node = 'altera_reserved_tdo'" {  } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "2.901 ns" { altera_internal_jtag~TDO altera_reserved_tdo } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.901 ns 100.00 % " "Info: Total cell delay = 2.901 ns ( 100.00 % )" {  } {  } 0}  } { { "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" "" { Report "C:/altera/kits/nios2/components/rcIII/system/db/rcIII_cmp.qrpt" Compiler "rcIII" "UNKNOWN" "V1" "C:/altera/kits/nios2/components/rcIII/system/db/rcIII.quartus_db" { Floorplan "C:/altera/kits/nios2/components/rcIII/system/" "" "2.901 ns" { altera_internal_jtag~TDO altera_reserved_tdo } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "2.901 ns" { altera_internal_jtag~TDO altera_reserved_tdo } { 0.000ns 0.000ns } { 0.000ns 2.901ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "sld_hub:sld_hub_inst\|lpm_shiftreg:jtag_ir_register\|dffs\[9\] altera_internal_jtag altera_internal_jtag~TCKUTAP 1.655 ns register " "Info: th for register \"sld_hub:sld_hub_inst\|lpm_shiftreg:jtag_ir_register\|dffs\[9\]\" (data pin = \"altera_internal_jtag\", clock pin = \"altera_internal_jtag~TCKUTAP\") is 1.655 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "altera_internal_jtag~TCKUTAP destination 1.764 ns + Longest register " "Info: + Longest clock path from clock \"altera_internal