dpram_pcp.tdf

niosII基础上实现的嵌入式网络驱动

--altdpram DEVICE_FAMILY="Cyclone II" lpm_hint="RAM_BLOCK_TYPE=AUTO" RDCONTROL_ACLR="OFF" RDCONTROL_REG="UNREGISTERED" SUPPRESS_MEMORY_CONVERSION_WARNINGS="ON" USE_EAB="ON" WIDTH=8 WIDTHAD=6 data inclock outclock outclocken q rdaddress wraddress wren RAM_BLOCK_TYPE="AUTO"
--VERSION_BEGIN 5.0 cbx_altdpram 2004:11:30:11:29:56:SJ cbx_altsyncram 2005:11:01:19:33:48:SJ cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_lpm_compare 2004:11:30:11:30:40:SJ cbx_lpm_decode 2004:12:13:14:19:12:SJ cbx_lpm_mux 2004:12:13:14:16:38:SJ cbx_mgl 2005:05:19:13:51:58:SJ cbx_stratix 2005:11:01:14:36:46:SJ cbx_stratixii 2004:12:22:13:27:12:SJ cbx_util_mgl 2005:04:04:13:50:06:SJ  VERSION_END


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FUNCTION altsyncram_toc1 (address_a[5..0], address_b[5..0], clock0, clock1, clocken1, data_a[7..0], wren_a)
RETURNS ( q_b[7..0]);

--synthesis_resources = M4K 1 
SUBDESIGN dpram_pcp
( 
	data[7..0]	:	input;
	inclock	:	input;
	outclock	:	input;
	outclocken	:	input;
	q[7..0]	:	output;
	rdaddress[5..0]	:	input;
	wraddress[5..0]	:	input;
	wren	:	input;
) 
VARIABLE 
	altsyncram2 : altsyncram_toc1;

BEGIN 
	altsyncram2.address_a[] = wraddress[];
	altsyncram2.address_b[] = rdaddress[];
	altsyncram2.clock0 = inclock;
	altsyncram2.clock1 = outclock;
	altsyncram2.clocken1 = outclocken;
	altsyncram2.data_a[] = data[];
	altsyncram2.wren_a = wren;
	q[] = altsyncram2.q_b[];
END;
--VALID FILE