📄 plj.map.rpt
字号:
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+-------------------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: fen:u1|lpm_counter:\p2:d0[0]_rtl_1 ;
+------------------------+-------------------+----------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+-------------------+----------------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 32 ; Untyped ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; LPM_PORT_UPDOWN ; PORT_CONNECTIVITY ; Untyped ;
; DEVICE_FAMILY ; ACEX1K ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+-------------------+----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: fen:u1|lpm_counter:\p1:cnt[0]_rtl_2 ;
+------------------------+-------------------+-----------------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+-------------------+-----------------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 10 ; Untyped ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; LPM_PORT_UPDOWN ; PORT_CONNECTIVITY ; Untyped ;
; DEVICE_FAMILY ; ACEX1K ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+-------------------+-----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 8.1 Build 163 10/28/2008 SJ Full Version
Info: Processing started: Wed May 20 23:29:03 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off plj -c plj
Info: Found 10 design units, including 5 entities, in source file plj.vhd
Info: Found design unit 1: fen-rtl
Info: Found design unit 2: pilvji-rtl
Info: Found design unit 3: lock-rtl
Info: Found design unit 4: ch-rtl
Info: Found design unit 5: plj-rtl
Info: Found entity 1: fen
Info: Found entity 2: pilvji
Info: Found entity 3: lock
Info: Found entity 4: ch
Info: Found entity 5: plj
Info: Elaborating entity "plj" for the top level hierarchy
Info: Elaborating entity "fen" for hierarchy "fen:u1"
Info: Elaborating entity "pilvji" for hierarchy "pilvji:u2"
Info: Elaborating entity "lock" for hierarchy "lock:u3"
Info: Elaborating entity "ch" for hierarchy "ch:u4"
Warning (10492): VHDL Process Statement warning at plj.vhd(138): signal "e0" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(138): signal "dian" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(139): signal "e1" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(139): signal "dian" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(140): signal "e2" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(140): signal "dian" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(141): signal "e3" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(141): signal "dian" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10492): VHDL Process Statement warning at plj.vhd(142): signal "dang1" is read inside the Process Statement but isn't in the Process Statement's sensitivity list
Warning (10631): VHDL Process Statement warning at plj.vhd(135): inferring latch(es) for signal or variable "tmp", which holds its previous value in one or more paths through the process
Warning (10631): VHDL Process Statement warning at plj.vhd(135): inferring latch(es) for signal or variable "nod", which holds its previous value in one or more paths through the process
Info (10041): Inferred latch for "nod" at plj.vhd(135)
Info (10041): Inferred latch for "tmp[0]" at plj.vhd(135)
Info (10041): Inferred latch for "tmp[1]" at plj.vhd(135)
Info (10041): Inferred latch for "tmp[2]" at plj.vhd(135)
Info (10041): Inferred latch for "tmp[3]" at plj.vhd(135)
Info: Inferred 3 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: "pilvji:u2|c0[0]~12"
Info: Inferred lpm_counter megafunction (LPM_WIDTH=32) from the following logic: "fen:u1|\p2:d0[0]~0"
Info: Inferred lpm_counter megafunction (LPM_WIDTH=10) from the following logic: "fen:u1|\p1:cnt[0]~0"
Info: Elaborated megafunction instantiation "pilvji:u2|lpm_counter:c0_rtl_0"
Info: Instantiated megafunction "pilvji:u2|lpm_counter:c0_rtl_0" with the following parameter:
Info: Parameter "LPM_WIDTH" = "4"
Info: Parameter "LPM_DIRECTION" = "UP"
Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Elaborated megafunction instantiation "pilvji:u2|lpm_counter:c0_rtl_0|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "pilvji:u2|lpm_counter:c0_rtl_0"
Info: Elaborated megafunction instantiation "fen:u1|lpm_counter:\p2:d0[0]_rtl_1"
Info: Instantiated megafunction "fen:u1|lpm_counter:\p2:d0[0]_rtl_1" with the following parameter:
Info: Parameter "LPM_WIDTH" = "32"
Info: Parameter "LPM_DIRECTION" = "UP"
Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Elaborated megafunction instantiation "fen:u1|lpm_counter:\p2:d0[0]_rtl_1|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "fen:u1|lpm_counter:\p2:d0[0]_rtl_1"
Info: Elaborated megafunction instantiation "fen:u1|lpm_counter:\p1:cnt[0]_rtl_2"
Info: Instantiated megafunction "fen:u1|lpm_counter:\p1:cnt[0]_rtl_2" with the following parameter:
Info: Parameter "LPM_WIDTH" = "10"
Info: Parameter "LPM_DIRECTION" = "UP"
Info: Parameter "LPM_TYPE" = "LPM_COUNTER"
Info: Elaborated megafunction instantiation "fen:u1|lpm_counter:\p1:cnt[0]_rtl_2|alt_counter_f10ke:wysi_counter", which is child of megafunction instantiation "fen:u1|lpm_counter:\p1:cnt[0]_rtl_2"
Warning: Latch ch:u4|tmp[0] has unsafe behavior
Warning: Ports D and ENA on the latch are fed by the same signal ch:u4|sel[2]
Warning: Latch ch:u4|tmp[1] has unsafe behavior
Warning: Ports D and ENA on the latch are fed by the same signal ch:u4|sel[2]
Warning: Latch ch:u4|tmp[2] has unsafe behavior
Warning: Ports D and ENA on the latch are fed by the same signal ch:u4|sel[2]
Warning: Latch ch:u4|tmp[3] has unsafe behavior
Warning: Ports D and ENA on the latch are fed by the same signal ch:u4|sel[2]
Info: Implemented 263 device resources after synthesis - the final resource count might be different
Info: Implemented 3 input pins
Info: Implemented 9 output pins
Info: Implemented 251 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 19 warnings
Info: Peak virtual memory: 181 megabytes
Info: Processing ended: Wed May 20 23:29:09 2009
Info: Elapsed time: 00:00:06
Info: Total CPU time (on all processors): 00:00:04
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -