📄 plj.tan.qmsg
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{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "37 " "Warning: Found 37 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst\|CQI\[3\] " "Info: Detected ripple clock \"CNT10:inst\|CQI\[3\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst\|CQI\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst\|CQI\[1\] " "Info: Detected ripple clock \"CNT10:inst\|CQI\[1\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst\|CQI\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst\|CQI\[2\] " "Info: Detected ripple clock \"CNT10:inst\|CQI\[2\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst\|CQI\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "rtl~889 " "Info: Detected gated clock \"rtl~889\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "rtl~889" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst4\|CQI\[2\] " "Info: Detected ripple clock \"CNT10:inst4\|CQI\[2\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst4\|CQI\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst4\|CQI\[3\] " "Info: Detected ripple clock \"CNT10:inst4\|CQI\[3\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst4\|CQI\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst4\|CQI\[1\] " "Info: Detected ripple clock \"CNT10:inst4\|CQI\[1\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst4\|CQI\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "rtl~890 " "Info: Detected gated clock \"rtl~890\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "rtl~890" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst4\|CQI\[0\] " "Info: Detected ripple clock \"CNT10:inst4\|CQI\[0\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst4\|CQI\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst5\|CQI\[3\] " "Info: Detected ripple clock \"CNT10:inst5\|CQI\[3\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst5\|CQI\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst5\|CQI\[0\] " "Info: Detected ripple clock \"CNT10:inst5\|CQI\[0\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst5\|CQI\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst5\|CQI\[2\] " "Info: Detected ripple clock \"CNT10:inst5\|CQI\[2\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst5\|CQI\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst5\|CQI\[1\] " "Info: Detected ripple clock \"CNT10:inst5\|CQI\[1\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst5\|CQI\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "rtl~886 " "Info: Detected gated clock \"rtl~886\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "rtl~886" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst6\|CQI\[3\] " "Info: Detected ripple clock \"CNT10:inst6\|CQI\[3\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst6\|CQI\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst6\|CQI\[1\] " "Info: Detected ripple clock \"CNT10:inst6\|CQI\[1\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst6\|CQI\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst6\|CQI\[2\] " "Info: Detected ripple clock \"CNT10:inst6\|CQI\[2\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst6\|CQI\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "rtl~888 " "Info: Detected gated clock \"rtl~888\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "rtl~888" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst7\|CQI\[2\] " "Info: Detected ripple clock \"CNT10:inst7\|CQI\[2\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst7\|CQI\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst7\|CQI\[1\] " "Info: Detected ripple clock \"CNT10:inst7\|CQI\[1\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst7\|CQI\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst7\|CQI\[3\] " "Info: Detected ripple clock \"CNT10:inst7\|CQI\[3\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst7\|CQI\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst7\|CQI\[0\] " "Info: Detected ripple clock \"CNT10:inst7\|CQI\[0\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst7\|CQI\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "rtl~887 " "Info: Detected gated clock \"rtl~887\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "rtl~887" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst8\|CQI\[2\] " "Info: Detected ripple clock \"CNT10:inst8\|CQI\[2\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst8\|CQI\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst8\|CQI\[1\] " "Info: Detected ripple clock \"CNT10:inst8\|CQI\[1\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst8\|CQI\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst8\|CQI\[3\] " "Info: Detected ripple clock \"CNT10:inst8\|CQI\[3\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst8\|CQI\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst8\|CQI\[0\] " "Info: Detected ripple clock \"CNT10:inst8\|CQI\[0\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst8\|CQI\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "rtl~885 " "Info: Detected gated clock \"rtl~885\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "rtl~885" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst6\|CQI\[0\] " "Info: Detected ripple clock \"CNT10:inst6\|CQI\[0\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst6\|CQI\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst9\|CQI\[3\] " "Info: Detected ripple clock \"CNT10:inst9\|CQI\[3\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst9\|CQI\[3\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst9\|CQI\[1\] " "Info: Detected ripple clock \"CNT10:inst9\|CQI\[1\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst9\|CQI\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst9\|CQI\[0\] " "Info: Detected ripple clock \"CNT10:inst9\|CQI\[0\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst9\|CQI\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst9\|CQI\[2\] " "Info: Detected ripple clock \"CNT10:inst9\|CQI\[2\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst9\|CQI\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "rtl~876 " "Info: Detected gated clock \"rtl~876\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "rtl~876" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "CNT10:inst\|CQI\[0\] " "Info: Detected ripple clock \"CNT10:inst\|CQI\[0\]\" as buffer" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "CNT10:inst\|CQI\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "TESTCTL:inst17\|CLK2 " "Info: Detected ripple clock \"TESTCTL:inst17\|CLK2\" as buffer" { } { { "TESTCTL.vhd" "" { Text "F:/数字频率计1/TESTCTL.vhd" 12 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "TESTCTL:inst17\|CLK2" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "TESTCTL:inst17\|DIV2CLK " "Info: Detected ripple clock \"TESTCTL:inst17\|DIV2CLK\" as buffer" { } { { "TESTCTL.vhd" "" { Text "F:/数字频率计1/TESTCTL.vhd" 30 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "TESTCTL:inst17\|DIV2CLK" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} } { } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLKIN register REG32B:inst2\|DOUT\[11\] register XIANSHI:inst3\|DATAIN\[12\] 50.15 MHz 19.94 ns Internal " "Info: Clock \"CLKIN\" has Internal fmax of 50.15 MHz between source register \"REG32B:inst2\|DOUT\[11\]\" and destination register \"XIANSHI:inst3\|DATAIN\[12\]\" (period= 19.94 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.747 ns + Longest register register " "Info: + Longest register to register delay is 2.747 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns REG32B:inst2\|DOUT\[11\] 1 REG LC_X10_Y7_N1 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X10_Y7_N1; Fanout = 1; REG Node = 'REG32B:inst2\|DOUT\[11\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "" { REG32B:inst2|DOUT[11] } "NODE_NAME" } "" } } { "REG32B.vhd" "" { Text "F:/数字频率计1/REG32B.vhd" 13 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.156 ns) + CELL(0.591 ns) 2.747 ns XIANSHI:inst3\|DATAIN\[12\] 2 REG LC_X10_Y8_N1 1 " "Info: 2: + IC(2.156 ns) + CELL(0.591 ns) = 2.747 ns; Loc. = LC_X10_Y8_N1; Fanout = 1; REG Node = 'XIANSHI:inst3\|DATAIN\[12\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.747 ns" { REG32B:inst2|DOUT[11] XIANSHI:inst3|DATAIN[12] } "NODE_NAME" } "" } } { "xiANshi.vhd" "" { Text "F:/数字频率计1/xiANshi.vhd" 27 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "0.591 ns ( 21.51 % ) " "Info: Total cell delay = 0.591 ns ( 21.51 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.156 ns ( 78.49 % ) " "Info: Total interconnect delay = 2.156 ns ( 78.49 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.747 ns" { REG32B:inst2|DOUT[11] XIANSHI:inst3|DATAIN[12] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.747 ns" { REG32B:inst2|DOUT[11] XIANSHI:inst3|DATAIN[12] } { 0.000ns 2.156ns } { 0.000ns 0.591ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-6.514 ns - Smallest " "Info: - Smallest clock skew is -6.514 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLKIN destination 7.336 ns + Shortest register " "Info: + Shortest clock path from clock \"CLKIN\" to destination register is 7.336 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns CLKIN 1 CLK PIN_127 113 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_127; Fanout = 113; CLK Node = 'CLKIN'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "" { CLKIN } "NODE_NAME" } "" } } { "F.bdf" "" { Schematic "F:/数字频率计1/F.bdf" { { -456 48 216 -440 "CLKIN" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.286 ns) + CELL(0.918 ns) 7.336 ns XIANSHI:inst3\|DATAIN\[12\] 2 REG LC_X10_Y8_N1 1 " "Info: 2: + IC(5.286 ns) + CELL(0.918 ns) = 7.336 ns; Loc. = LC_X10_Y8_N1; Fanout = 1; REG Node = 'XIANSHI:inst3\|DATAIN\[12\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "6.204 ns" { CLKIN XIANSHI:inst3|DATAIN[12] } "NODE_NAME" } "" } } { "xiANshi.vhd" "" { Text "F:/数字频率计1/xiANshi.vhd" 27 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.050 ns ( 27.94 % ) " "Info: Total cell delay = 2.050 ns ( 27.94 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.286 ns ( 72.06 % ) " "Info: Total interconnect delay = 5.286 ns ( 72.06 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "7.336 ns" { CLKIN XIANSHI:inst3|DATAIN[12] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "7.336 ns" { CLKIN CLKIN~combout XIANSHI:inst3|DATAIN[12] } { 0.000ns 0.000ns 5.286ns } { 0.000ns 1.132ns 0.918ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLKIN source 13.850 ns - Longest register " "Info: - Longest clock path from clock \"CLKIN\" to source register is 13.850 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns CLKIN 1 CLK PIN_127 113 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_127; Fanout = 113; CLK Node = 'CLKIN'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "" { CLKIN } "NODE_NAME" } "" } } { "F.bdf" "" { Schematic "F:/数字频率计1/F.bdf" { { -456 48 216 -440 "CLKIN" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.286 ns) + CELL(1.294 ns) 7.712 ns TESTCTL:inst17\|CLK2 2 REG LC_X12_Y3_N4 3 " "Info: 2: + IC(5.286 ns) + CELL(1.294 ns) = 7.712 ns; Loc. = LC_X12_Y3_N4; Fanout = 3; REG Node = 'TESTCTL:inst17\|CLK2'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "6.580 ns" { CLKIN TESTCTL:inst17|CLK2 } "NODE_NAME" } "" } } { "TESTCTL.vhd" "" { Text "F:/数字频率计1/TESTCTL.vhd" 12 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.887 ns) + CELL(1.294 ns) 9.893 ns TESTCTL:inst17\|DIV2CLK 3 REG LC_X12_Y3_N1 66 " "Info: 3: + IC(0.887 ns) + CELL(1.294 ns) = 9.893 ns; Loc. = LC_X12_Y3_N1; Fanout = 66; REG Node = 'TESTCTL:inst17\|DIV2CLK'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.181 ns" { TESTCTL:inst17|CLK2 TESTCTL:inst17|DIV2CLK } "NODE_NAME" } "" } } { "TESTCTL.vhd" "" { Text "F:/数字频率计1/TESTCTL.vhd" 30 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.039 ns) + CELL(0.918 ns) 13.850 ns REG32B:inst2\|DOUT\[11\] 4 REG LC_X10_Y7_N1 1 " "Info: 4: + IC(3.039 ns) + CELL(0.918 ns) = 13.850 ns; Loc. = LC_X10_Y7_N1; Fanout = 1; REG Node = 'REG32B:inst2\|DOUT\[11\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "3.957 ns" { TESTCTL:inst17|DIV2CLK REG32B:inst2|DOUT[11] } "NODE_NAME" } "" } } { "REG32B.vhd" "" { Text "F:/数字频率计1/REG32B.vhd" 13 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.638 ns ( 33.49 % ) " "Info: Total cell delay = 4.638 ns ( 33.49 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.212 ns ( 66.51 % ) " "Info: Total interconnect delay = 9.212 ns ( 66.51 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "13.850 ns" { CLKIN TESTCTL:inst17|CLK2 TESTCTL:inst17|DIV2CLK REG32B:inst2|DOUT[11] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "13.850 ns" { CLKIN CLKIN~combout TESTCTL:inst17|CLK2 TESTCTL:inst17|DIV2CLK REG32B:inst2|DOUT[11] } { 0.000ns 0.000ns 5.286ns 0.887ns 3.039ns } { 0.000ns 1.132ns 1.294ns 1.294ns 0.918ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "7.336 ns" { CLKIN XIANSHI:inst3|DATAIN[12] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "7.336 ns" { CLKIN CLKIN~combout XIANSHI:inst3|DATAIN[12] } { 0.000ns 0.000ns 5.286ns } { 0.000ns 1.132ns 0.918ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "13.850 ns" { CLKIN TESTCTL:inst17|CLK2 TESTCTL:inst17|DIV2CLK REG32B:inst2|DOUT[11] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "13.850 ns" { CLKIN CLKIN~combout TESTCTL:inst17|CLK2 TESTCTL:inst17|DIV2CLK REG32B:inst2|DOUT[11] } { 0.000ns 0.000ns 5.286ns 0.887ns 3.039ns } { 0.000ns 1.132ns 1.294ns 1.294ns 0.918ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.376 ns + " "Info: + Micro clock to output delay of source is 0.376 ns" { } { { "REG32B.vhd" "" { Text "F:/数字频率计1/REG32B.vhd" 13 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.333 ns + " "Info: + Micro setup delay of destination is 0.333 ns" { } { { "xiANshi.vhd" "" { Text "F:/数字频率计1/xiANshi.vhd" 27 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" { } { { "REG32B.vhd" "" { Text "F:/数字频率计1/REG32B.vhd" 13 -1 0 } } { "xiANshi.vhd" "" { Text "F:/数字频率计1/xiANshi.vhd" 27 -1 0 } } } 0 0 "Delay path is controlled by inverted clocks -- if clock duty cycle is 50%, fmax is divided by two" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.747 ns" { REG32B:inst2|DOUT[11] XIANSHI:inst3|DATAIN[12] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.747 ns" { REG32B:inst2|DOUT[11] XIANSHI:inst3|DATAIN[12] } { 0.000ns 2.156ns } { 0.000ns 0.591ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "7.336 ns" { CLKIN XIANSHI:inst3|DATAIN[12] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "7.336 ns" { CLKIN CLKIN~combout XIANSHI:inst3|DATAIN[12] } { 0.000ns 0.000ns 5.286ns } { 0.000ns 1.132ns 0.918ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "13.850 ns" { CLKIN TESTCTL:inst17|CLK2 TESTCTL:inst17|DIV2CLK REG32B:inst2|DOUT[11] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "13.850 ns" { CLKIN CLKIN~combout TESTCTL:inst17|CLK2 TESTCTL:inst17|DIV2CLK REG32B:inst2|DOUT[11] } { 0.000ns 0.000ns 5.286ns 0.887ns 3.039ns } { 0.000ns 1.132ns 1.294ns 1.294ns 0.918ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLK register CNT10:inst10\|CQI\[0\] register CNT10:inst10\|CQI\[1\] 125.5 MHz 7.968 ns Internal " "Info: Clock \"CLK\" has Internal fmax of 125.5 MHz between source register \"CNT10:inst10\|CQI\[0\]\" and destination register \"CNT10:inst10\|CQI\[1\]\" (period= 7.968 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.176 ns + Longest register register " "Info: + Longest register to register delay is 2.176 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns CNT10:inst10\|CQI\[0\] 1 REG LC_X11_Y4_N3 7 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X11_Y4_N3; Fanout = 7; REG Node = 'CNT10:inst10\|CQI\[0\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "" { CNT10:inst10|CQI[0] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.993 ns) + CELL(1.183 ns) 2.176 ns CNT10:inst10\|CQI\[1\] 2 REG LC_X11_Y4_N9 8 " "Info: 2: + IC(0.993 ns) + CELL(1.183 ns) = 2.176 ns; Loc. = LC_X11_Y4_N9; Fanout = 8; REG Node = 'CNT10:inst10\|CQI\[1\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.176 ns" { CNT10:inst10|CQI[0] CNT10:inst10|CQI[1] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.183 ns ( 54.37 % ) " "Info: Total cell delay = 1.183 ns ( 54.37 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.993 ns ( 45.63 % ) " "Info: Total interconnect delay = 0.993 ns ( 45.63 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.176 ns" { CNT10:inst10|CQI[0] CNT10:inst10|CQI[1] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.176 ns" { CNT10:inst10|CQI[0] CNT10:inst10|CQI[1] } { 0.000ns 0.993ns } { 0.000ns 1.183ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-5.083 ns - Smallest " "Info: - Smallest clock skew is -5.083 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK destination 36.541 ns + Shortest register " "Info: + Shortest clock path from clock \"CLK\" to destination register is 36.541 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns CLK 1 CLK PIN_41 4 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_41; Fanout = 4; CLK Node = 'CLK'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "" { CLK } "NODE_NAME" } "" } } { "F.bdf" "" { Schematic "F:/数字频率计1/F.bdf" { { -504 200 368 -488 "CLK" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.869 ns) + CELL(1.294 ns) 8.295 ns CNT10:inst\|CQI\[3\] 2 REG LC_X12_Y5_N9 6 " "Info: 2: + IC(5.869 ns) + CELL(1.294 ns) = 8.295 ns; Loc. = LC_X12_Y5_N9; Fanout = 6; REG Node = 'CNT10:inst\|CQI\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "7.163 ns" { CLK CNT10:inst|CQI[3] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.054 ns) + CELL(0.200 ns) 9.549 ns rtl~889 3 COMB LC_X12_Y5_N5 4 " "Info: 3: + IC(1.054 ns) + CELL(0.200 ns) = 9.549 ns; Loc. = LC_X12_Y5_N5; Fanout = 4; COMB Node = 'rtl~889'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.254 ns" { CNT10:inst|CQI[3] rtl~889 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.109 ns) + CELL(1.294 ns) 11.952 ns CNT10:inst4\|CQI\[2\] 4 REG LC_X11_Y5_N8 5 " "Info: 4: + IC(1.109 ns) + CELL(1.294 ns) = 11.952 ns; Loc. = LC_X11_Y5_N8; Fanout = 5; REG Node = 'CNT10:inst4\|CQI\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.403 ns" { rtl~889 CNT10:inst4|CQI[2] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.007 ns) + CELL(0.200 ns) 13.159 ns rtl~890 5 COMB LC_X11_Y5_N1 4 " "Info: 5: + IC(1.007 ns) + CELL(0.200 ns) = 13.159 ns; Loc. = LC_X11_Y5_N1; Fanout = 4; COMB Node = 'rtl~890'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.207 ns" { CNT10:inst4|CQI[2] rtl~890 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.749 ns) + CELL(1.294 ns) 15.202 ns CNT10:inst5\|CQI\[3\] 6 REG LC_X11_Y5_N3 6 " "Info: 6: + IC(0.749 ns) + CELL(1.294 ns) = 15.202 ns; Loc. = LC_X11_Y5_N3; Fanout = 6; REG Node = 'CNT10:inst5\|CQI\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.043 ns" { rtl~890 CNT10:inst5|CQI[3] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.012 ns) + CELL(0.200 ns) 16.414 ns rtl~886 7 COMB LC_X11_Y5_N4 4 " "Info: 7: + IC(1.012 ns) + CELL(0.200 ns) = 16.414 ns; Loc. = LC_X11_Y5_N4; Fanout = 4; COMB Node = 'rtl~886'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.212 ns" { CNT10:inst5|CQI[3] rtl~886 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.093 ns) + CELL(1.294 ns) 18.801 ns CNT10:inst6\|CQI\[2\] 8 REG LC_X10_Y5_N1 5 " "Info: 8: + IC(1.093 ns) + CELL(1.294 ns) = 18.801 ns; Loc. = LC_X10_Y5_N1; Fanout = 5; REG Node = 'CNT10:inst6\|CQI\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.387 ns" { rtl~886 CNT10:inst6|CQI[2] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.052 ns) + CELL(0.200 ns) 20.053 ns rtl~888 9 COMB LC_X10_Y5_N8 4 " "Info: 9: + IC(1.052 ns) + CELL(0.200 ns) = 20.053 ns; Loc. = LC_X10_Y5_N8; Fanout = 4; COMB Node = 'rtl~888'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.252 ns" { CNT10:inst6|CQI[2] rtl~888 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.698 ns) + CELL(1.294 ns) 22.045 ns CNT10:inst7\|CQI\[2\] 10 REG LC_X10_Y5_N3 5 " "Info: 10: + IC(0.698 ns) + CELL(1.294 ns) = 22.045 ns; Loc. = LC_X10_Y5_N3; Fanout = 5; REG Node = 'CNT10:inst7\|CQI\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.992 ns" { rtl~888 CNT10:inst7|CQI[2] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.962 ns) + CELL(0.200 ns) 23.207 ns rtl~887 11 COMB LC_X10_Y5_N0 4 " "Info: 11: + IC(0.962 ns) + CELL(0.200 ns) = 23.207 ns; Loc. = LC_X10_Y5_N0; Fanout = 4; COMB Node = 'rtl~887'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.162 ns" { CNT10:inst7|CQI[2] rtl~887 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.786 ns) + CELL(1.294 ns) 26.287 ns CNT10:inst8\|CQI\[2\] 12 REG LC_X12_Y5_N8 5 " "Info: 12: + IC(1.786 ns) + CELL(1.294 ns) = 26.287 ns; Loc. = LC_X12_Y5_N8; Fanout = 5; REG Node = 'CNT10:inst8\|CQI\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "3.080 ns" { rtl~887 CNT10:inst8|CQI[2] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.959 ns) + CELL(0.200 ns) 27.446 ns rtl~885 13 COMB LC_X12_Y5_N3 4 " "Info: 13: + IC(0.959 ns) + CELL(0.200 ns) = 27.446 ns; Loc. = LC_X12_Y5_N3; Fanout = 4; COMB Node = 'rtl~885'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.159 ns" { CNT10:inst8|CQI[2] rtl~885 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.906 ns) + CELL(1.294 ns) 30.646 ns CNT10:inst9\|CQI\[3\] 14 REG LC_X11_Y4_N8 6 " "Info: 14: + IC(1.906 ns) + CELL(1.294 ns) = 30.646 ns; Loc. = LC_X11_Y4_N8; Fanout = 6; REG Node = 'CNT10:inst9\|CQI\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "3.200 ns" { rtl~885 CNT10:inst9|CQI[3] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.012 ns) + CELL(0.200 ns) 31.858 ns rtl~876 15 COMB LC_X11_Y4_N5 4 " "Info: 15: + IC(1.012 ns) + CELL(0.200 ns) = 31.858 ns; Loc. = LC_X11_Y4_N5; Fanout = 4; COMB Node = 'rtl~876'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.212 ns" { CNT10:inst9|CQI[3] rtl~876 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.765 ns) + CELL(0.918 ns) 36.541 ns CNT10:inst10\|CQI\[1\] 16 REG LC_X11_Y4_N9 8 " "Info: 16: + IC(3.765 ns) + CELL(0.918 ns) = 36.541 ns; Loc. = LC_X11_Y4_N9; Fanout = 8; REG Node = 'CNT10:inst10\|CQI\[1\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "4.683 ns" { rtl~876 CNT10:inst10|CQI[1] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "12.508 ns ( 34.23 % ) " "Info: Total cell delay = 12.508 ns ( 34.23 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "24.033 ns ( 65.77 % ) " "Info: Total interconnect delay = 24.033 ns ( 65.77 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "36.541 ns" { CLK CNT10:inst|CQI[3] rtl~889 CNT10:inst4|CQI[2] rtl~890 CNT10:inst5|CQI[3] rtl~886 CNT10:inst6|CQI[2] rtl~888 CNT10:inst7|CQI[2] rtl~887 CNT10:inst8|CQI[2] rtl~885 CNT10:inst9|CQI[3] rtl~876 CNT10:inst10|CQI[1] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "36.541 ns" { CLK CLK~combout CNT10:inst|CQI[3] rtl~889 CNT10:inst4|CQI[2] rtl~890 CNT10:inst5|CQI[3] rtl~886 CNT10:inst6|CQI[2] rtl~888 CNT10:inst7|CQI[2] rtl~887 CNT10:inst8|CQI[2] rtl~885 CNT10:inst9|CQI[3] rtl~876 CNT10:inst10|CQI[1] } { 0.000ns 0.000ns 5.869ns 1.054ns 1.109ns 1.007ns 0.749ns 1.012ns 1.093ns 1.052ns 0.698ns 0.962ns 1.786ns 0.959ns 1.906ns 1.012ns 3.765ns } { 0.000ns 1.132ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 0.918ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK source 41.624 ns - Longest register " "Info: - Longest clock path from clock \"CLK\" to source register is 41.624 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.132 ns) 1.132 ns CLK 1 CLK PIN_41 4 " "Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_41; Fanout = 4; CLK Node = 'CLK'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "" { CLK } "NODE_NAME" } "" } } { "F.bdf" "" { Schematic "F:/数字频率计1/F.bdf" { { -504 200 368 -488 "CLK" "" } } } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.869 ns) + CELL(1.294 ns) 8.295 ns CNT10:inst\|CQI\[0\] 2 REG LC_X12_Y5_N6 6 " "Info: 2: + IC(5.869 ns) + CELL(1.294 ns) = 8.295 ns; Loc. = LC_X12_Y5_N6; Fanout = 6; REG Node = 'CNT10:inst\|CQI\[0\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "7.163 ns" { CLK CNT10:inst|CQI[0] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.008 ns) + CELL(0.914 ns) 10.217 ns rtl~889 3 COMB LC_X12_Y5_N5 4 " "Info: 3: + IC(1.008 ns) + CELL(0.914 ns) = 10.217 ns; Loc. = LC_X12_Y5_N5; Fanout = 4; COMB Node = 'rtl~889'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.922 ns" { CNT10:inst|CQI[0] rtl~889 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.109 ns) + CELL(1.294 ns) 12.620 ns CNT10:inst4\|CQI\[1\] 4 REG LC_X11_Y5_N6 6 " "Info: 4: + IC(1.109 ns) + CELL(1.294 ns) = 12.620 ns; Loc. = LC_X11_Y5_N6; Fanout = 6; REG Node = 'CNT10:inst4\|CQI\[1\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.403 ns" { rtl~889 CNT10:inst4|CQI[1] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.020 ns) + CELL(0.914 ns) 14.554 ns rtl~890 5 COMB LC_X11_Y5_N1 4 " "Info: 5: + IC(1.020 ns) + CELL(0.914 ns) = 14.554 ns; Loc. = LC_X11_Y5_N1; Fanout = 4; COMB Node = 'rtl~890'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.934 ns" { CNT10:inst4|CQI[1] rtl~890 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.749 ns) + CELL(1.294 ns) 16.597 ns CNT10:inst5\|CQI\[1\] 6 REG LC_X11_Y5_N5 6 " "Info: 6: + IC(0.749 ns) + CELL(1.294 ns) = 16.597 ns; Loc. = LC_X11_Y5_N5; Fanout = 6; REG Node = 'CNT10:inst5\|CQI\[1\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.043 ns" { rtl~890 CNT10:inst5|CQI[1] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.025 ns) + CELL(0.914 ns) 18.536 ns rtl~886 7 COMB LC_X11_Y5_N4 4 " "Info: 7: + IC(1.025 ns) + CELL(0.914 ns) = 18.536 ns; Loc. = LC_X11_Y5_N4; Fanout = 4; COMB Node = 'rtl~886'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.939 ns" { CNT10:inst5|CQI[1] rtl~886 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.093 ns) + CELL(1.294 ns) 20.923 ns CNT10:inst6\|CQI\[0\] 8 REG LC_X10_Y5_N5 6 " "Info: 8: + IC(1.093 ns) + CELL(1.294 ns) = 20.923 ns; Loc. = LC_X10_Y5_N5; Fanout = 6; REG Node = 'CNT10:inst6\|CQI\[0\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.387 ns" { rtl~886 CNT10:inst6|CQI[0] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.060 ns) + CELL(0.914 ns) 22.897 ns rtl~888 9 COMB LC_X10_Y5_N8 4 " "Info: 9: + IC(1.060 ns) + CELL(0.914 ns) = 22.897 ns; Loc. = LC_X10_Y5_N8; Fanout = 4; COMB Node = 'rtl~888'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.974 ns" { CNT10:inst6|CQI[0] rtl~888 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.698 ns) + CELL(1.294 ns) 24.889 ns CNT10:inst7\|CQI\[0\] 10 REG LC_X10_Y5_N4 6 " "Info: 10: + IC(0.698 ns) + CELL(1.294 ns) = 24.889 ns; Loc. = LC_X10_Y5_N4; Fanout = 6; REG Node = 'CNT10:inst7\|CQI\[0\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.992 ns" { rtl~888 CNT10:inst7|CQI[0] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.050 ns) + CELL(0.914 ns) 26.853 ns rtl~887 11 COMB LC_X10_Y5_N0 4 " "Info: 11: + IC(1.050 ns) + CELL(0.914 ns) = 26.853 ns; Loc. = LC_X10_Y5_N0; Fanout = 4; COMB Node = 'rtl~887'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.964 ns" { CNT10:inst7|CQI[0] rtl~887 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.786 ns) + CELL(1.294 ns) 29.933 ns CNT10:inst8\|CQI\[0\] 12 REG LC_X12_Y5_N4 6 " "Info: 12: + IC(1.786 ns) + CELL(1.294 ns) = 29.933 ns; Loc. = LC_X12_Y5_N4; Fanout = 6; REG Node = 'CNT10:inst8\|CQI\[0\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "3.080 ns" { rtl~887 CNT10:inst8|CQI[0] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.010 ns) + CELL(0.914 ns) 31.857 ns rtl~885 13 COMB LC_X12_Y5_N3 4 " "Info: 13: + IC(1.010 ns) + CELL(0.914 ns) = 31.857 ns; Loc. = LC_X12_Y5_N3; Fanout = 4; COMB Node = 'rtl~885'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.924 ns" { CNT10:inst8|CQI[0] rtl~885 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.906 ns) + CELL(1.294 ns) 35.057 ns CNT10:inst9\|CQI\[2\] 14 REG LC_X11_Y4_N6 5 " "Info: 14: + IC(1.906 ns) + CELL(1.294 ns) = 35.057 ns; Loc. = LC_X11_Y4_N6; Fanout = 5; REG Node = 'CNT10:inst9\|CQI\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "3.200 ns" { rtl~885 CNT10:inst9|CQI[2] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.970 ns) + CELL(0.914 ns) 36.941 ns rtl~876 15 COMB LC_X11_Y4_N5 4 " "Info: 15: + IC(0.970 ns) + CELL(0.914 ns) = 36.941 ns; Loc. = LC_X11_Y4_N5; Fanout = 4; COMB Node = 'rtl~876'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "1.884 ns" { CNT10:inst9|CQI[2] rtl~876 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.765 ns) + CELL(0.918 ns) 41.624 ns CNT10:inst10\|CQI\[0\] 16 REG LC_X11_Y4_N3 7 " "Info: 16: + IC(3.765 ns) + CELL(0.918 ns) = 41.624 ns; Loc. = LC_X11_Y4_N3; Fanout = 7; REG Node = 'CNT10:inst10\|CQI\[0\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "4.683 ns" { rtl~876 CNT10:inst10|CQI[0] } "NODE_NAME" } "" } } { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "17.506 ns ( 42.06 % ) " "Info: Total cell delay = 17.506 ns ( 42.06 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "24.118 ns ( 57.94 % ) " "Info: Total interconnect delay = 24.118 ns ( 57.94 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "41.624 ns" { CLK CNT10:inst|CQI[0] rtl~889 CNT10:inst4|CQI[1] rtl~890 CNT10:inst5|CQI[1] rtl~886 CNT10:inst6|CQI[0] rtl~888 CNT10:inst7|CQI[0] rtl~887 CNT10:inst8|CQI[0] rtl~885 CNT10:inst9|CQI[2] rtl~876 CNT10:inst10|CQI[0] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "41.624 ns" { CLK CLK~combout CNT10:inst|CQI[0] rtl~889 CNT10:inst4|CQI[1] rtl~890 CNT10:inst5|CQI[1] rtl~886 CNT10:inst6|CQI[0] rtl~888 CNT10:inst7|CQI[0] rtl~887 CNT10:inst8|CQI[0] rtl~885 CNT10:inst9|CQI[2] rtl~876 CNT10:inst10|CQI[0] } { 0.000ns 0.000ns 5.869ns 1.008ns 1.109ns 1.020ns 0.749ns 1.025ns 1.093ns 1.060ns 0.698ns 1.050ns 1.786ns 1.010ns 1.906ns 0.970ns 3.765ns } { 0.000ns 1.132ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 0.918ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "36.541 ns" { CLK CNT10:inst|CQI[3] rtl~889 CNT10:inst4|CQI[2] rtl~890 CNT10:inst5|CQI[3] rtl~886 CNT10:inst6|CQI[2] rtl~888 CNT10:inst7|CQI[2] rtl~887 CNT10:inst8|CQI[2] rtl~885 CNT10:inst9|CQI[3] rtl~876 CNT10:inst10|CQI[1] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "36.541 ns" { CLK CLK~combout CNT10:inst|CQI[3] rtl~889 CNT10:inst4|CQI[2] rtl~890 CNT10:inst5|CQI[3] rtl~886 CNT10:inst6|CQI[2] rtl~888 CNT10:inst7|CQI[2] rtl~887 CNT10:inst8|CQI[2] rtl~885 CNT10:inst9|CQI[3] rtl~876 CNT10:inst10|CQI[1] } { 0.000ns 0.000ns 5.869ns 1.054ns 1.109ns 1.007ns 0.749ns 1.012ns 1.093ns 1.052ns 0.698ns 0.962ns 1.786ns 0.959ns 1.906ns 1.012ns 3.765ns } { 0.000ns 1.132ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 0.918ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "41.624 ns" { CLK CNT10:inst|CQI[0] rtl~889 CNT10:inst4|CQI[1] rtl~890 CNT10:inst5|CQI[1] rtl~886 CNT10:inst6|CQI[0] rtl~888 CNT10:inst7|CQI[0] rtl~887 CNT10:inst8|CQI[0] rtl~885 CNT10:inst9|CQI[2] rtl~876 CNT10:inst10|CQI[0] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "41.624 ns" { CLK CLK~combout CNT10:inst|CQI[0] rtl~889 CNT10:inst4|CQI[1] rtl~890 CNT10:inst5|CQI[1] rtl~886 CNT10:inst6|CQI[0] rtl~888 CNT10:inst7|CQI[0] rtl~887 CNT10:inst8|CQI[0] rtl~885 CNT10:inst9|CQI[2] rtl~876 CNT10:inst10|CQI[0] } { 0.000ns 0.000ns 5.869ns 1.008ns 1.109ns 1.020ns 0.749ns 1.025ns 1.093ns 1.060ns 0.698ns 1.050ns 1.786ns 1.010ns 1.906ns 0.970ns 3.765ns } { 0.000ns 1.132ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 0.918ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.376 ns + " "Info: + Micro clock to output delay of source is 0.376 ns" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.333 ns + " "Info: + Micro setup delay of destination is 0.333 ns" { } { { "CNT10.vhd" "" { Text "F:/数字频率计1/CNT10.vhd" 16 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "2.176 ns" { CNT10:inst10|CQI[0] CNT10:inst10|CQI[1] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.176 ns" { CNT10:inst10|CQI[0] CNT10:inst10|CQI[1] } { 0.000ns 0.993ns } { 0.000ns 1.183ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "36.541 ns" { CLK CNT10:inst|CQI[3] rtl~889 CNT10:inst4|CQI[2] rtl~890 CNT10:inst5|CQI[3] rtl~886 CNT10:inst6|CQI[2] rtl~888 CNT10:inst7|CQI[2] rtl~887 CNT10:inst8|CQI[2] rtl~885 CNT10:inst9|CQI[3] rtl~876 CNT10:inst10|CQI[1] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "36.541 ns" { CLK CLK~combout CNT10:inst|CQI[3] rtl~889 CNT10:inst4|CQI[2] rtl~890 CNT10:inst5|CQI[3] rtl~886 CNT10:inst6|CQI[2] rtl~888 CNT10:inst7|CQI[2] rtl~887 CNT10:inst8|CQI[2] rtl~885 CNT10:inst9|CQI[3] rtl~876 CNT10:inst10|CQI[1] } { 0.000ns 0.000ns 5.869ns 1.054ns 1.109ns 1.007ns 0.749ns 1.012ns 1.093ns 1.052ns 0.698ns 0.962ns 1.786ns 0.959ns 1.906ns 1.012ns 3.765ns } { 0.000ns 1.132ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 1.294ns 0.200ns 0.918ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "plj" "UNKNOWN" "V1" "F:/数字频率计1/db/plj.quartus_db" { Floorplan "F:/数字频率计1/" "" "41.624 ns" { CLK CNT10:inst|CQI[0] rtl~889 CNT10:inst4|CQI[1] rtl~890 CNT10:inst5|CQI[1] rtl~886 CNT10:inst6|CQI[0] rtl~888 CNT10:inst7|CQI[0] rtl~887 CNT10:inst8|CQI[0] rtl~885 CNT10:inst9|CQI[2] rtl~876 CNT10:inst10|CQI[0] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "41.624 ns" { CLK CLK~combout CNT10:inst|CQI[0] rtl~889 CNT10:inst4|CQI[1] rtl~890 CNT10:inst5|CQI[1] rtl~886 CNT10:inst6|CQI[0] rtl~888 CNT10:inst7|CQI[0] rtl~887 CNT10:inst8|CQI[0] rtl~885 CNT10:inst9|CQI[2] rtl~876 CNT10:inst10|CQI[0] } { 0.000ns 0.000ns 5.869ns 1.008ns 1.109ns 1.020ns 0.749ns 1.025ns 1.093ns 1.060ns 0.698ns 1.050ns 1.786ns 1.010ns 1.906ns 0.970ns 3.765ns } { 0.000ns 1.132ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 1.294ns 0.914ns 0.918ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
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