subadd.map.summary

一个四位二进制加/减运算器。 要求：当控制端G＝0时做加运算

Analysis & Synthesis Status : Successful - Tue Apr 28 17:26:38 2009
Quartus II Version : 8.1 Build 163 10/28/2008 SJ Full Version
Revision Name : subadd
Top-level Entity Name : subadd
Family : Cyclone
Total logic elements : 19
Total pins : 14
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0