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📄 adder.map.qmsg

📁 采用加法树流水线乘法构造八位乘法器
💻 QMSG
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{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder10:inst9\|reg1\[16\] data_in GND " "Warning: Reduced register \"adder10:inst9\|reg1\[16\]\" with stuck data_in port to stuck value GND" {  } { { "adder10.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder10.vhd" 26 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst11\|b\[0\] data_in GND " "Warning: Reduced register \"tran10to12:inst11\|b\[0\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst11\|b\[1\] data_in GND " "Warning: Reduced register \"tran10to12:inst11\|b\[1\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst11\|a\[10\] data_in GND " "Warning: Reduced register \"tran10to12:inst11\|a\[10\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst11\|a\[11\] data_in GND " "Warning: Reduced register \"tran10to12:inst11\|a\[11\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst12\|reg1\[1\] data_in GND " "Warning: Reduced register \"adder13:inst12\|reg1\[1\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst12\|reg1\[3\] data_in GND " "Warning: Reduced register \"adder13:inst12\|reg1\[3\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst12\|reg1\[20\] data_in GND " "Warning: Reduced register \"adder13:inst12\|reg1\[20\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst12\|reg1\[22\] data_in GND " "Warning: Reduced register \"adder13:inst12\|reg1\[22\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran8to9:inst5\|b\[0\] data_in GND " "Warning: Reduced register \"tran8to9:inst5\|b\[0\]\" with stuck data_in port to stuck value GND" {  } { { "tran8to9.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran8to9.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran8to9:inst5\|a\[8\] data_in GND " "Warning: Reduced register \"tran8to9:inst5\|a\[8\]\" with stuck data_in port to stuck value GND" {  } { { "tran8to9.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran8to9.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder10:inst8\|reg1\[1\] data_in GND " "Warning: Reduced register \"adder10:inst8\|reg1\[1\]\" with stuck data_in port to stuck value GND" {  } { { "adder10.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder10.vhd" 26 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder10:inst8\|reg1\[16\] data_in GND " "Warning: Reduced register \"adder10:inst8\|reg1\[16\]\" with stuck data_in port to stuck value GND" {  } { { "adder10.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder10.vhd" 26 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran8to9:inst4\|b\[0\] data_in GND " "Warning: Reduced register \"tran8to9:inst4\|b\[0\]\" with stuck data_in port to stuck value GND" {  } { { "tran8to9.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran8to9.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran8to9:inst4\|a\[8\] data_in GND " "Warning: Reduced register \"tran8to9:inst4\|a\[8\]\" with stuck data_in port to stuck value GND" {  } { { "tran8to9.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran8to9.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder10:inst7\|reg1\[1\] data_in GND " "Warning: Reduced register \"adder10:inst7\|reg1\[1\]\" with stuck data_in port to stuck value GND" {  } { { "adder10.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder10.vhd" 26 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder10:inst7\|reg1\[16\] data_in GND " "Warning: Reduced register \"adder10:inst7\|reg1\[16\]\" with stuck data_in port to stuck value GND" {  } { { "adder10.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder10.vhd" 26 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst6\|b\[0\] data_in GND " "Warning: Reduced register \"tran10to12:inst6\|b\[0\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst6\|b\[1\] data_in GND " "Warning: Reduced register \"tran10to12:inst6\|b\[1\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst6\|a\[10\] data_in GND " "Warning: Reduced register \"tran10to12:inst6\|a\[10\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran10to12:inst6\|a\[11\] data_in GND " "Warning: Reduced register \"tran10to12:inst6\|a\[11\]\" with stuck data_in port to stuck value GND" {  } { { "tran10to12.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran10to12.vhd" 20 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst1\|reg1\[1\] data_in GND " "Warning: Reduced register \"adder13:inst1\|reg1\[1\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst1\|reg1\[3\] data_in GND " "Warning: Reduced register \"adder13:inst1\|reg1\[3\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst1\|reg1\[20\] data_in GND " "Warning: Reduced register \"adder13:inst1\|reg1\[20\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "adder13:inst1\|reg1\[22\] data_in GND " "Warning: Reduced register \"adder13:inst1\|reg1\[22\]\" with stuck data_in port to stuck value GND" {  } { { "adder13.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/adder13.vhd" 29 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "tran13to16:inst14\|b\[0\] data_in GND " "Warning: Reduced register \"tran13to16:inst14\|b\[0\]\" with stuck data_in port to stuck value GND" {  } { { "tran13to16.vhd" "" { Text "E:/2008-2008学期工作/第二学期研究生课程/fpga实验课/课程实验报告/课程报告2_加法树8位乘法器/adder/tran13to16.vhd" 21 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}

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