fred.fit.eqn

用FPGA仿真实现数控分频器

--C1_safe_q[3] is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|safe_q[3] at LC_X34_Y19_N8
--operation mode is normal

C1_safe_q[3]_lut_out = C1_safe_q[3] $ C1L8;
C1_safe_q[3] = DFFEAS(C1_safe_q[3]_lut_out, GLOBAL(clk), VCC, , , , , A1L01, );


--A1L2 is equal~3 at LC_X34_Y19_N3
--operation mode is normal

A1L2 = C1_safe_q[3] $ num[3];


--C1_safe_q[2] is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|safe_q[2] at LC_X34_Y19_N7
--operation mode is arithmetic

C1_safe_q[2]_lut_out = C1_safe_q[2] $ (!C1L5);
C1_safe_q[2] = DFFEAS(C1_safe_q[2]_lut_out, GLOBAL(clk), VCC, , , , , A1L01, );

--C1L8 is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|counter_cella2~COUT at LC_X34_Y19_N7
--operation mode is arithmetic

C1L8_cout_0 = C1_safe_q[2] & !C1L5;
C1L8 = CARRY(C1L8_cout_0);

--C1L9 is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|counter_cella2~COUTCOUT1_1 at LC_X34_Y19_N7
--operation mode is arithmetic

C1L9_cout_1 = C1_safe_q[2] & !C1L6;
C1L9 = CARRY(C1L9_cout_1);


--C1_safe_q[0] is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|safe_q[0] at LC_X34_Y19_N5
--operation mode is arithmetic

C1_safe_q[0]_lut_out = !C1_safe_q[0];
C1_safe_q[0] = DFFEAS(C1_safe_q[0]_lut_out, GLOBAL(clk), VCC, , , , , A1L01, );

--C1L2 is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|counter_cella0~COUT at LC_X34_Y19_N5
--operation mode is arithmetic

C1L2_cout_0 = C1_safe_q[0];
C1L2 = CARRY(C1L2_cout_0);

--C1L3 is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|counter_cella0~COUTCOUT1_1 at LC_X34_Y19_N5
--operation mode is arithmetic

C1L3_cout_1 = C1_safe_q[0];
C1L3 = CARRY(C1L3_cout_1);


--A1L11 is reduce_nor~10 at LC_X34_Y19_N2
--operation mode is normal

A1L11 = num[0] & num[2] $ C1_safe_q[2] # !C1_safe_q[0] # !num[0] & C1_safe_q[0] # num[2] $ C1_safe_q[2];


--C1_safe_q[1] is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|safe_q[1] at LC_X34_Y19_N6
--operation mode is arithmetic

C1_safe_q[1]_lut_out = C1_safe_q[1] $ (C1L2);
C1_safe_q[1] = DFFEAS(C1_safe_q[1]_lut_out, GLOBAL(clk), VCC, , , , , A1L01, );

--C1L5 is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|counter_cella1~COUT at LC_X34_Y19_N6
--operation mode is arithmetic

C1L5_cout_0 = !C1L2 # !C1_safe_q[1];
C1L5 = CARRY(C1L5_cout_0);

--C1L6 is lpm_counter:dats_rtl_0|cntr_0b7:auto_generated|counter_cella1~COUTCOUT1 at LC_X34_Y19_N6
--operation mode is arithmetic

C1L6_cout_1 = !C1L3 # !C1_safe_q[1];
C1L6 = CARRY(C1L6_cout_1);


--A1L01 is reduce_nor~0 at LC_X34_Y19_N9
--operation mode is normal

A1L01 = !A1L11 & !A1L2 & C1_safe_q[1] $ !num[1];

--A1L4Q is fout~reg0 at LC_X34_Y19_N9
--operation mode is normal

A1L4Q = DFFEAS(A1L01, GLOBAL(clk), VCC, , , , , , );


--num[3] is num[3] at PIN_168
--operation mode is input

num[3] = INPUT();


--num[2] is num[2] at PIN_176
--operation mode is input

num[2] = INPUT();


--num[0] is num[0] at PIN_178
--operation mode is input

num[0] = INPUT();


--num[1] is num[1] at PIN_177
--operation mode is input

num[1] = INPUT();


--clk is clk at PIN_180
--operation mode is input

clk = INPUT();


--fout is fout at PIN_79
--operation mode is output

fout = OUTPUT(A1L4Q);