txsysrtl.ucf

RTL 异步数据传送模块 用verilog HDL 语言描述 输入为八比特数据

#PACE: Start of Constraints generated by PACE

#PACE: Start of PACE I/O Pin Assignments
NET "Busy"  LOC = "P1"  ;
NET "clock"  LOC = "P9"  ;
NET "Datain<0>"  LOC = "P13"  ;
NET "Datain<1>"  LOC = "P14"  ;
NET "Datain<2>"  LOC = "P15"  ;
NET "Datain<3>"  LOC = "P17"  ;
NET "Datain<4>"  LOC = "P18"  ;
NET "Datain<5>"  LOC = "P19"  ;
NET "Datain<6>"  LOC = "P20"  ;
NET "Datain<7>"  LOC = "P21"  ;
NET "odd_noteven"  LOC = "P36"  ;
NET "reset"  LOC = "P35"  ;
NET "TxData"  LOC = "P2"  ;
NET "write"  LOC = "P37"  ;

#PACE: Start of PACE Area Constraints

#PACE: Start of PACE Prohibit Constraints

#PACE: End of Constraints generated by PACE