basketball.tan.summary

cycloneII Quartus verilog开发的简单时序电路

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 5.168 ns
From           : nPAUSE
To             : TimerH[2]~reg0
From Clock     : --
To Clock       : CP
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 8.047 ns
From           : TimerL[1]~reg0
To             : Alarm
From Clock     : CP
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -4.032 ns
From           : nPAUSE
To             : TimerL[0]~reg0
From Clock     : --
To Clock       : CP
Failed Paths   : 0

Type           : Clock Setup: 'CP'
Slack          : 80.620 ns
Required Time  : 12.00 MHz ( period = 83.333 ns )
Actual Time    : 368.60 MHz ( period = 2.713 ns )
From           : TimerL[1]~reg0
To             : TimerH[2]~reg0
From Clock     : CP
To Clock       : CP
Failed Paths   : 0

Type           : Clock Hold: 'CP'
Slack          : 0.391 ns
Required Time  : 12.00 MHz ( period = 83.333 ns )
Actual Time    : N/A
From           : TimerH[1]~reg0
To             : TimerH[1]~reg0
From Clock     : CP
To Clock       : CP
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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