📄 uart16750.tan.rpt
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; 22.405 ns ; 131.61 MHz ( period = 7.598 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg2 ; uart_16750:inst|iFECounter[6] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.333 ns ;
; 22.405 ns ; 131.61 MHz ( period = 7.598 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg1 ; uart_16750:inst|iFECounter[6] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.333 ns ;
; 22.405 ns ; 131.61 MHz ( period = 7.598 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg0 ; uart_16750:inst|iFECounter[6] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.333 ns ;
; 22.419 ns ; 131.86 MHz ( period = 7.584 ns ) ; uart_16750:inst|iTSR[2] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[1] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 7.369 ns ;
; 22.476 ns ; 132.86 MHz ( period = 7.527 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg5 ; uart_16750:inst|iFECounter[5] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.262 ns ;
; 22.476 ns ; 132.86 MHz ( period = 7.527 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg4 ; uart_16750:inst|iFECounter[5] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.262 ns ;
; 22.476 ns ; 132.86 MHz ( period = 7.527 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg3 ; uart_16750:inst|iFECounter[5] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.262 ns ;
; 22.476 ns ; 132.86 MHz ( period = 7.527 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg2 ; uart_16750:inst|iFECounter[5] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.262 ns ;
; 22.476 ns ; 132.86 MHz ( period = 7.527 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg1 ; uart_16750:inst|iFECounter[5] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.262 ns ;
; 22.476 ns ; 132.86 MHz ( period = 7.527 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg0 ; uart_16750:inst|iFECounter[5] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.262 ns ;
; 22.547 ns ; 134.12 MHz ( period = 7.456 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg5 ; uart_16750:inst|iFECounter[4] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.191 ns ;
; 22.547 ns ; 134.12 MHz ( period = 7.456 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg4 ; uart_16750:inst|iFECounter[4] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.191 ns ;
; 22.547 ns ; 134.12 MHz ( period = 7.456 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg3 ; uart_16750:inst|iFECounter[4] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.191 ns ;
; 22.547 ns ; 134.12 MHz ( period = 7.456 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg2 ; uart_16750:inst|iFECounter[4] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.191 ns ;
; 22.547 ns ; 134.12 MHz ( period = 7.456 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg1 ; uart_16750:inst|iFECounter[4] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.191 ns ;
; 22.547 ns ; 134.12 MHz ( period = 7.456 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg0 ; uart_16750:inst|iFECounter[4] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.191 ns ;
; 22.618 ns ; 135.41 MHz ( period = 7.385 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg5 ; uart_16750:inst|iFECounter[3] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.120 ns ;
; 22.618 ns ; 135.41 MHz ( period = 7.385 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg4 ; uart_16750:inst|iFECounter[3] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.120 ns ;
; 22.618 ns ; 135.41 MHz ( period = 7.385 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg3 ; uart_16750:inst|iFECounter[3] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.120 ns ;
; 22.618 ns ; 135.41 MHz ( period = 7.385 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg2 ; uart_16750:inst|iFECounter[3] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.120 ns ;
; 22.618 ns ; 135.41 MHz ( period = 7.385 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg1 ; uart_16750:inst|iFECounter[3] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.120 ns ;
; 22.618 ns ; 135.41 MHz ( period = 7.385 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg0 ; uart_16750:inst|iFECounter[3] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.120 ns ;
; 22.632 ns ; 135.67 MHz ( period = 7.371 ns ) ; uart_16750:inst|iTSR[3] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[0] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 7.156 ns ;
; 22.650 ns ; 136.00 MHz ( period = 7.353 ns ) ; uart_16750:inst|iTSR[4] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[0] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 7.138 ns ;
; 22.689 ns ; 136.72 MHz ( period = 7.314 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg5 ; uart_16750:inst|iFECounter[2] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.049 ns ;
; 22.689 ns ; 136.72 MHz ( period = 7.314 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg4 ; uart_16750:inst|iFECounter[2] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.049 ns ;
; 22.689 ns ; 136.72 MHz ( period = 7.314 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg3 ; uart_16750:inst|iFECounter[2] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.049 ns ;
; 22.689 ns ; 136.72 MHz ( period = 7.314 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg2 ; uart_16750:inst|iFECounter[2] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.049 ns ;
; 22.689 ns ; 136.72 MHz ( period = 7.314 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg1 ; uart_16750:inst|iFECounter[2] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.049 ns ;
; 22.689 ns ; 136.72 MHz ( period = 7.314 ns ) ; uart_16750:inst|slib_fifo:UART_RXFF|scfifo:scfifo_component|scfifo_ko31:auto_generated|a_dpfifo_7g31:dpfifo|altsyncram_h981:FIFOram|ram_block1a0~portb_address_reg0 ; uart_16750:inst|iFECounter[2] ; CLK ; CLK ; 30.003 ns ; 29.738 ns ; 7.049 ns ;
; 22.707 ns ; 137.06 MHz ( period = 7.296 ns ) ; uart_16750:inst|iTSR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[4] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 7.081 ns ;
; 22.733 ns ; 137.55 MHz ( period = 7.270 ns ) ; uart_16750:inst|iLCR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[4] ; CLK ; CLK ; 30.003 ns ; 29.781 ns ; 7.048 ns ;
; 22.778 ns ; 138.41 MHz ( period = 7.225 ns ) ; uart_16750:inst|iTSR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[3] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 7.010 ns ;
; 22.802 ns ; 138.87 MHz ( period = 7.201 ns ) ; uart_16750:inst|iTSR[2] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[0] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 6.986 ns ;
; 22.804 ns ; 138.91 MHz ( period = 7.199 ns ) ; uart_16750:inst|iLCR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[3] ; CLK ; CLK ; 30.003 ns ; 29.781 ns ; 6.977 ns ;
; 22.820 ns ; 139.22 MHz ( period = 7.183 ns ) ; uart_16750:inst|iTSR[5] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[4] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 6.968 ns ;
; 22.840 ns ; 139.61 MHz ( period = 7.163 ns ) ; uart_16750:inst|iLCR[4] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[4] ; CLK ; CLK ; 30.003 ns ; 29.783 ns ; 6.943 ns ;
; 22.849 ns ; 139.78 MHz ( period = 7.154 ns ) ; uart_16750:inst|iTSR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[2] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 6.939 ns ;
; 22.875 ns ; 140.29 MHz ( period = 7.128 ns ) ; uart_16750:inst|iLCR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[2] ; CLK ; CLK ; 30.003 ns ; 29.781 ns ; 6.906 ns ;
; 22.891 ns ; 140.61 MHz ( period = 7.112 ns ) ; uart_16750:inst|iTSR[5] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[3] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 6.897 ns ;
; 22.911 ns ; 141.00 MHz ( period = 7.092 ns ) ; uart_16750:inst|iLCR[4] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[3] ; CLK ; CLK ; 30.003 ns ; 29.783 ns ; 6.872 ns ;
; 22.920 ns ; 141.18 MHz ( period = 7.083 ns ) ; uart_16750:inst|iTSR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[1] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 6.868 ns ;
; 22.946 ns ; 141.70 MHz ( period = 7.057 ns ) ; uart_16750:inst|iLCR[0] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[1] ; CLK ; CLK ; 30.003 ns ; 29.781 ns ; 6.835 ns ;
; 22.960 ns ; 141.98 MHz ( period = 7.043 ns ) ; uart_16750:inst|iTSR[1] ; uart_16750:inst|uart_receiver:UART_RX|slib_mv_filter:RX_MVF|iCounter[4] ; CLK ; CLK ; 30.003 ns ; 29.788 ns ; 6.828 ns ;
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