uart16750.fit.summary

来自「Implements a 16550/16750 UART core」· SUMMARY 代码 · 共 17 行

Fitter Status : Successful - Tue Feb 17 23:02:36 2009
Quartus II Version : 8.0 Build 215 05/29/2008 SJ Full Version
Revision Name : UART16750
Top-level Entity Name : UART16750
Family : Cyclone II
Device : EP2C5F256C6
Timing Models : Final
Total logic elements : 448 / 4,608 ( 10 % )
    Total combinational functions : 418 / 4,608 ( 9 % )
    Dedicated logic registers : 285 / 4,608 ( 6 % )
Total registers : 285
Total pins : 36 / 158 ( 23 % )
Total virtual pins : 0
Total memory bits : 1,216 / 119,808 ( 1 % )
Embedded Multiplier 9-bit elements : 0 / 26 ( 0 % )
Total PLLs : 0 / 2 ( 0 % )