exe_unit.vhd

CPU代码-VHDL语言

--执行部分exe_unit
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity exe_unit is
	port(
	  	t1: 		 in std_logic;
		op_code:	 in std_logic_vector(3 downto 0);
		zj_instruct: in std_logic;
	  	cj_instruct: in std_logic; --"JNC ADR"指令
	    pc: 		 in std_logic_vector(15 downto 0);
		pc_inc:		 in std_logic_vector(15 downto 0);
		c_in: 		 in std_logic;  --以前指令产生的进位C
	    z_in: 		 in std_logic;  --以前指令产生的Z标志
		Mem_Write:   in std_logic;  --为1时，写存储器
		c_tmp:		 out std_logic;  
		z_tmp:		 out std_logic;
		c_z_j_flag:  out std_logic; --为1时进行条件转移
		r_sjmp_addr: in std_logic_vector(15 downto 0); --相对转移地址
		DW_intruct:  in std_logic;  ----为1表示本条指令是双字指令， 
		sjmp_addr:	 out std_logic_vector(15 downto 0); --条件转移指令的转移地址
		SR_data:     in std_logic_vector(15 downto 0);  
		DR_data:     in std_logic_vector(15 downto 0);
		Mem_Addr:    out std_logic_vector(15 downto 0);
		result:      out std_logic_vector(15 downto 0)  --运算结果
	    );

end exe_unit;

architecture behav of exe_unit is
signal A,B :std_logic_vector(15 downto 0);
signal result_t:  std_logic_vector(16 downto 0);
signal result_test,result_cmp:  std_logic_vector(16 downto 0);
signal temp:  std_logic_vector(16 downto 0);
signal sel_test:   std_logic;
signal sel_cmp:   std_logic;


begin
c_z_j_flag <= ((not c_in) and cj_instruct) or ((not z_in) and zj_instruct);---？？？
A <= DR_data;
B <= SR_data;
sjmp_addr <= pc_inc + r_sjmp_addr;	
 


Mem_Addr_proc: process(t1,SR_data,pc,DW_intruct,pc_inc,Mem_Write,DR_data)---内存地址的产生
begin
	if t1 = '1' then  
		Mem_Addr <= pc;
	else
		if DW_intruct = '1' then
			Mem_Addr <= pc_inc;
		elsif Mem_Write = '1' then
			Mem_Addr <= DR_data;
		else
			Mem_Addr <= SR_data;
		end if;
	end if;
end process;

alu_proc:process(op_code,A,B,c_in)----16种操作
begin
    sel_test <= '0';
    sel_cmp <= '0';
	case op_code is
		when "0000" =>
			result_t <= ('0' & A) + ('0' & B);
		when "0001" =>
			result_t <= ('0' & A) +  '1';
 	    when "0010" =>
			result_t <= ('0' & A) - ('0' & B);
		when "0011" =>
			result_t <= ('0' & A) -  '1';
		when "0100" =>
			result_t <= ('0' & A) and ('0' & B);
		when "0101" =>
			result_t <= ('0' & A) or ('0' & B);
		when "0110" =>
			result_t <= not ('0' & A);
		when "0111" =>
			result_t <=  ('0' & B);
		when "1000" =>  
		    sel_test <= '1';                --TEST
			result_test <= ('0' & A) AND ('0' & B);
		when "1001" =>                  --SHL  
			result_t <= A & '0';
 	    when "1010" =>                  --SHR  
			result_t <= (A(0) & '0')& A(15 downto 1);
		when "1011" =>                  --SOL
	    	result_t <= A(15)& A(14 downto 0) & A(15);
		when "1100" =>                  --SOR
			result_t <= A(0) & A(0) & A(15 downto 1);
		when "1101" =>  
		    sel_cmp <= '1';                 --CMP
			result_cmp <= ('0' & A) -  ('0' & B);
		when "1110" =>               --ADC     --XADD
		   result_t<= ('0' & A) + ('0' & B)+c_in;
			--B <= A;
			--A <= result_t(15 downto 0);
			
    	when "1111" =>               --SBB    --XCHANG
		  result_t<= ('0' & A) + ('0' & B)-c_in;
		--  temp <= '0' & A;
			--A <= B;
			--B <= temp( 15 downto 0);
			--result_t <= temp; 
	end case;
	
end process;

process (sel_test,sel_cmp,result_t)
begin
if sel_test = '1' then
   c_tmp <= '0';
   z_tmp <= (not result_test(15)) and (not result_test(14)) and  
		 (not result_test(13)) and (not result_test(12)) and
		 (not result_test(11)) and (not result_test(10)) and
		 (not result_test(9)) and (not result_test(8)) and
		 (not result_test(7)) and (not result_test(6)) and
		 (not result_test(5)) and (not result_test(4)) and
		 (not result_test(3)) and (not result_test(2)) and
		 (not result_test(1)) and (not result_test(0));
     result<="ZZZZZZZZZZZZZZZZ";
     
elsif sel_cmp = '1' then
   c_tmp <= result_cmp(16);
   z_tmp <= (not result_cmp(15)) and (not result_cmp(14)) and  
		 (not result_cmp(13)) and (not result_cmp(12)) and
		 (not result_cmp(11)) and (not result_cmp(10)) and
		 (not result_cmp(9)) and (not result_cmp(8)) and
		 (not result_cmp(7)) and (not result_cmp(6)) and
		 (not result_cmp(5)) and (not result_cmp(4)) and
		 (not result_cmp(3)) and (not result_cmp(2)) and
		 (not result_cmp(1)) and (not result_cmp(0));
	result<= "ZZZZZZZZZZZZZZZZ";	
else 
  result <= result_t(15 downto 0);
  c_tmp <= result_t(16);
  z_tmp <= (not result_t(15)) and (not result_t(14)) and  
		 (not result_t(13)) and (not result_t(12)) and
		 (not result_t(11)) and (not result_t(10)) and
		 (not result_t(9)) and (not result_t(8)) and
		 (not result_t(7)) and (not result_t(6)) and
		 (not result_t(5)) and (not result_t(4)) and
		 (not result_t(3)) and (not result_t(2)) and
		 (not result_t(1)) and (not result_t(0))  ;

end if;
end process;
end behav;