stmch1.fit.summary

来自「4位可逆计数器：将50MHz的时钟进行 分频后的结果作为时钟控制」· SUMMARY 代码 · 共 16 行

Flow Status : Successful - Fri Jan 04 17:22:03 2008
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : stmch1
Top-level Entity Name : stmch1
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Preliminary
Met timing requirements : N/A
Total logic elements : 2 / 33,216 ( < 1 % )
Total registers : 2
Total pins : 4 / 475 ( < 1 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )