wave_presets.do

用NiosII实现的数字钟

# Display signals from module onchip_ram_4K
add wave -noupdate -divider {onchip_ram_4K}
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/az_addr
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/az_be_n
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/az_cs
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/az_data
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/az_rd_n
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/az_wr_n
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/clk
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/za_data
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/za_valid
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/za_waitrequest
add wave -noupdate -format Literal -radix ascii /test_bench/DUT/the_onchip_ram_4K/CODE
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/zs_addr
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/zs_ba
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/zs_cs_n
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/zs_ras_n
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/zs_cas_n
add wave -noupdate -format Logic /test_bench/DUT/the_onchip_ram_4K/zs_we_n
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/zs_dq
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_onchip_ram_4K/zs_dqm


# Display signals from module sdram
add wave -noupdate -divider {sdram}
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/az_addr
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/az_be_n
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/az_cs
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/az_data
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/az_rd_n
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/az_wr_n
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/clk
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/za_data
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/za_valid
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/za_waitrequest
add wave -noupdate -format Literal -radix ascii /test_bench/DUT/the_sdram/CODE
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_addr
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_ba
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_cs_n
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/zs_ras_n
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/zs_cas_n
add wave -noupdate -format Logic /test_bench/DUT/the_sdram/zs_we_n
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_dq
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_sdram/zs_dqm


# Display signals from module jtag_uart
add wave -noupdate -divider {jtag_uart}
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_address
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_chipselect
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_irq
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_read_n
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_readdata
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_waitrequest
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/av_write_n
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_jtag_uart/av_writedata
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/dataavailable
add wave -noupdate -format Logic /test_bench/DUT/the_jtag_uart/readyfordata


# Display signals from module cpu
add wave -noupdate -divider {cpu}
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_irq
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_waitrequest
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_address
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_byteenable
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_read
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_readdata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_write
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/d_writedata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_waitrequest
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_address
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_read
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/i_readdata
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/F_pcb
add wave -noupdate -format Logic -radix ascii /test_bench/DUT/the_cpu/the_cpu_test_bench/W_vinst
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/W_valid
add wave -noupdate -format Logic -radix hexadecimal /test_bench/DUT/the_cpu/the_cpu_test_bench/D_iw


# Display signals from module uart
add wave -noupdate -divider {uart}
add wave -noupdate -divider {  Bus Interface}
add wave -noupdate -format Logic /test_bench/DUT/the_uart/chipselect
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_uart/address
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_uart/writedata
add wave -noupdate -format Literal -radix hexadecimal /test_bench/DUT/the_uart/readdata
add wave -noupdate -divider {  Internals}
add wave -noupdate -format Logic /test_bench/DUT/the_uart/tx_ready
add wave -noupdate -format Literal -radix ascii /test_bench/DUT/the_uart/tx_data
add wave -noupdate -format Logic /test_bench/DUT/the_uart/rx_char_ready
add wave -noupdate -format Literal -radix ascii /test_bench/DUT/the_uart/rx_data


configure wave -justifyvalue right
configure wave -signalnamewidth 1
TreeUpdate [SetDefaultTree]