vcs_rebuild

来自「精通verilog HDL语言编程的一个不错的cpu 代码」· 代码 · 共 8 行

#!/bin/sh -e
# This file is automatically generated by VCS.  Any changes you make
# to it will be overwritten the next time VCS is run.
/synopsys/vcs6.0.1/sun_sparc_solaris_5.5.1/bin/vcs1 -Xrebuild -Mloader=/usr/ccs/bin/ld -Mout=simv -Mrun=/synopsys/vcs6.0.1/sun_sparc_solaris_5.5.1/lib/libvcs.a -Mcmodrun= '-Mobjects=/synopsys/vcs6.0.1/virsimdir/Solaris/vcdplus/vcs6_0/vcspli.o ../fileio.o /synopsys/vcs6.0.1/sun_sparc_solaris_5.5.1/lib/crt1.o /synopsys/vcs6.0.1/sun_sparc_solaris_5.5.1/lib/crti.o /synopsys/vcs6.0.1/sun_sparc_solaris_5.5.1/lib/crtn.o -lnsl -lsocket -ldl ' -Mmhdlobjs= -Mcsrc= -Mupdate=1 '-Msyslibs=-lm -lc ' -f mp.f -P /synopsys/vcs6.0.1/virsimdir/Solaris/vcdplus/vcs6_0/vcs.tab +v2k -gen_obj 2>&1
cd csrc 2>&1
make  -f Makefile     LD='/usr/ccs/bin/ld'   DEFAULT_RUNTIME=TRUE product 2>&1
exit $?