case1.edn

《设计与验证VerilogHDL》源码实例 和 Verilog规范

(edif case1
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timeStamp 2006 1 13 15 59 30)
      (author "Synplicity, Inc.")
      (program "Synplify Pro" (version "8.1.0, Build 532R"))
     )
   )
  (library LUCENT
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell OB (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell IB (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell ORCALUT4 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port A (direction INPUT))
           (port B (direction INPUT))
           (port C (direction INPUT))
           (port D (direction INPUT))
           (port Z (direction OUTPUT))
         )
       )
    )
    (cell PFUMX (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port ALUT (direction INPUT))
           (port BLUT (direction INPUT))
           (port C0 (direction INPUT))
           (port Z (direction OUTPUT))
         )
       )
    )
    (cell VLO (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port Z (direction OUTPUT))
         )
       )
    )
  )
  (library work
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell case1 (cellType GENERIC)
       (view verilog (viewType NETLIST)
         (interface
           (port a (direction INPUT)
 )
           (port b (direction INPUT)
 )
           (port c (direction INPUT)
 )
           (port d (direction INPUT)
 )
           (port sel0 (direction INPUT)
 )
           (port sel1 (direction INPUT)
 )
           (port sel2 (direction INPUT)
 )
           (port sel3 (direction INPUT)
 )
           (port z (direction OUTPUT))
         )
         (contents
          (instance GND (viewRef PRIM (cellRef VLO (libraryRef LUCENT)))          )
          (instance z_m2_0 (viewRef PRIM (cellRef PFUMX (libraryRef LUCENT)))          )
          (instance z_m2_0_bm (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
           (property lut_function (string "(!C (B A)+C (B+!A))"))
          )
          (instance z_m2_0_am (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
           (property lut_function (string "(!D (!C (B A))+D (C+(B A)))"))
          )
          (instance z_pad (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance sel3_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance sel2_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance sel1_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance sel0_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance d_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance c_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance b_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance a_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance z_0 (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
           (property lut_function (string "(!C (B A)+C (!B+A))"))
          )
          (net GNDZ0 (joined
           (portRef Z (instanceRef GND))
          ))
          (net z_m2 (joined
           (portRef Z (instanceRef z_m2_0))
           (portRef C (instanceRef z_0))
          ))
          (net a_c (joined
           (portRef O (instanceRef a_pad))
           (portRef B (instanceRef z_m2_0_am))
          ))
          (net a (joined
           (portRef a)
           (portRef I (instanceRef a_pad))
          ))
          (net b_c (joined
           (portRef O (instanceRef b_pad))
           (portRef C (instanceRef z_m2_0_bm))
          ))
          (net b (joined
           (portRef b)
           (portRef I (instanceRef b_pad))
          ))
          (net c_c (joined
           (portRef O (instanceRef c_pad))
           (portRef B (instanceRef z_m2_0_bm))
           (portRef D (instanceRef z_m2_0_am))
          ))
          (net c (joined
           (portRef c)
           (portRef I (instanceRef c_pad))
          ))
          (net d_c (joined
           (portRef O (instanceRef d_pad))
           (portRef A (instanceRef z_0))
          ))
          (net d (joined
           (portRef d)
           (portRef I (instanceRef d_pad))
          ))
          (net sel0_c (joined
           (portRef O (instanceRef sel0_pad))
           (portRef B (instanceRef z_0))
          ))
          (net sel0 (joined
           (portRef sel0)
           (portRef I (instanceRef sel0_pad))
          ))
          (net sel1_c (joined
           (portRef O (instanceRef sel1_pad))
           (portRef A (instanceRef z_m2_0_bm))
           (portRef C (instanceRef z_m2_0_am))
          ))
          (net sel1 (joined
           (portRef sel1)
           (portRef I (instanceRef sel1_pad))
          ))
          (net sel2_c (joined
           (portRef O (instanceRef sel2_pad))
           (portRef C0 (instanceRef z_m2_0))
          ))
          (net sel2 (joined
           (portRef sel2)
           (portRef I (instanceRef sel2_pad))
          ))
          (net sel3_c (joined
           (portRef O (instanceRef sel3_pad))
           (portRef A (instanceRef z_m2_0_am))
          ))
          (net sel3 (joined
           (portRef sel3)
           (portRef I (instanceRef sel3_pad))
          ))
          (net z_c (joined
           (portRef Z (instanceRef z_0))
           (portRef I (instanceRef z_pad))
          ))
          (net z (joined
           (portRef O (instanceRef z_pad))
           (portRef z)
          ))
          (net z_m2_0_amZ0 (joined
           (portRef Z (instanceRef z_m2_0_am))
           (portRef BLUT (instanceRef z_m2_0))
          ))
          (net z_m2_0_bmZ0 (joined
           (portRef Z (instanceRef z_m2_0_bm))
           (portRef ALUT (instanceRef z_m2_0))
          ))
         )
       )
    )
  )
  (design case1 (cellRef case1 (libraryRef work)))
)