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📄 asyn_rst.edn

📁 《设计与验证VerilogHDL》源码实例 和 Verilog规范
💻 EDN
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(edif asyn_rst
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timeStamp 2006 1 11 17 8 0)
      (author "Synplicity, Inc.")
      (program "Synplify Pro" (version "8.1.0, Build 532R"))
     )
   )
  (library LUCENT
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell OB (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell IB (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
    (cell FD1S3AX (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port D (direction INPUT))
           (port CK (direction INPUT))
           (port Q (direction OUTPUT))
         )
       )
    )
    (cell ORCALUT4 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port A (direction INPUT))
           (port B (direction INPUT))
           (port C (direction INPUT))
           (port D (direction INPUT))
           (port Z (direction OUTPUT))
         )
       )
    )
    (cell GSR (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port GSR (direction INPUT))
         )
       )
    )
    (cell INV (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port A (direction INPUT))
           (port Z (direction OUTPUT))
         )
       )
    )
    (cell VLO (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port Z (direction OUTPUT))
         )
       )
    )
  )
  (library work
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell asyn_rst (cellType GENERIC)
       (view verilog (viewType NETLIST)
         (interface
           (port (array (rename cnt1 "cnt1[4:0]") 5) (direction OUTPUT))
           (port (array (rename cnt2 "cnt2[4:0]") 5) (direction OUTPUT))
           (port clk (direction INPUT)
 )
           (port rst_ (direction INPUT)
 )
         )
         (contents
          (instance GND (viewRef PRIM (cellRef VLO (libraryRef LUCENT)))          )
          (instance cnt2_1_i_2 (viewRef PRIM (cellRef INV (libraryRef LUCENT)))          )
          (instance cnt1_1_i_0 (viewRef PRIM (cellRef INV (libraryRef LUCENT)))          )
          (instance cnt2_pad_4 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt2_pad_3 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt2_pad_2 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt2_pad_1 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt2_pad_0 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt1_pad_4 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt1_pad_3 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt1_pad_2 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt1_pad_1 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance cnt1_pad_0 (viewRef PRIM (cellRef OB (libraryRef LUCENT)))          )
          (instance rst__pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance clk_pad (viewRef PRIM (cellRef IB (libraryRef LUCENT)))          )
          (instance cnt2_1_2__Q (viewRef PRIM (cellRef FD1S3AX (libraryRef LUCENT)))          )
          (instance cnt2_1_1__Q (viewRef PRIM (cellRef FD1S3AX (libraryRef LUCENT)))          )
          (instance cnt2_1_0__Q (viewRef PRIM (cellRef FD1S3AX (libraryRef LUCENT)))          )
          (instance cnt1_1_1__Q (viewRef PRIM (cellRef FD1S3AX (libraryRef LUCENT)))          )
          (instance cnt1_1_0__Q (viewRef PRIM (cellRef FD1S3AX (libraryRef LUCENT)))          )
          (instance GSR (viewRef PRIM (cellRef GSR (libraryRef LUCENT)))
          )
          (instance N_8_i_i (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
           (property lut_function (string "(!B !A+B A)"))
          )
          (instance un3_cnt2_m_0_a2_0_a2_2 (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
           (property lut_function (string "(!B !A)"))
          )
          (instance N_16_i (viewRef PRIM (cellRef ORCALUT4 (libraryRef LUCENT)))
           (property lut_function (string "(B+A)"))
          )
          (net cnt1_1_iZ0Z_0 (joined
           (portRef Z (instanceRef cnt1_1_i_0))
           (portRef D (instanceRef cnt2_1_0__Q))
          ))
          (net N_8_i_iZ0 (joined
           (portRef Z (instanceRef N_8_i_i))
           (portRef D (instanceRef cnt2_1_1__Q))
          ))
          (net un3_cnt2_m_0_a2_0_a2_0_2 (joined
           (portRef Z (instanceRef un3_cnt2_m_0_a2_0_a2_2))
           (portRef D (instanceRef cnt2_1_2__Q))
          ))
          (net cnt2_1_iZ0Z_2 (joined
           (portRef Z (instanceRef cnt2_1_i_2))
           (portRef D (instanceRef cnt1_1_0__Q))
          ))
          (net N_16_iZ0 (joined
           (portRef Z (instanceRef N_16_i))
           (portRef D (instanceRef cnt1_1_1__Q))
          ))
          (net clk_c (joined
           (portRef O (instanceRef clk_pad))
           (portRef CK (instanceRef cnt1_1_0__Q))
           (portRef CK (instanceRef cnt1_1_1__Q))
           (portRef CK (instanceRef cnt2_1_0__Q))
           (portRef CK (instanceRef cnt2_1_1__Q))
           (portRef CK (instanceRef cnt2_1_2__Q))
          ))
          (net clk (joined
           (portRef clk)
           (portRef I (instanceRef clk_pad))
          ))
          (net rst__c (joined
           (portRef O (instanceRef rst__pad))
           (portRef GSR (instanceRef GSR))
          ))
          (net rst_ (joined
           (portRef rst_)
           (portRef I (instanceRef rst__pad))
          ))
          (net cnt1_c_0 (joined
           (portRef Q (instanceRef cnt1_1_0__Q))
           (portRef A (instanceRef cnt1_1_i_0))
           (portRef A (instanceRef N_8_i_i))
           (portRef A (instanceRef N_16_i))
           (portRef I (instanceRef cnt1_pad_0))
           (portRef A (instanceRef un3_cnt2_m_0_a2_0_a2_2))
          ))
          (net cnt1_0 (joined
           (portRef O (instanceRef cnt1_pad_0))
           (portRef (member cnt1 4))
          ))
          (net cnt1_c_1 (joined
           (portRef Q (instanceRef cnt1_1_1__Q))
           (portRef B (instanceRef N_8_i_i))
           (portRef B (instanceRef N_16_i))
           (portRef I (instanceRef cnt1_pad_1))
           (portRef B (instanceRef un3_cnt2_m_0_a2_0_a2_2))
          ))
          (net cnt1_1 (joined
           (portRef O (instanceRef cnt1_pad_1))
           (portRef (member cnt1 3))
          ))
          (net cnt1_2 (joined
           (portRef O (instanceRef cnt1_pad_2))
           (portRef (member cnt1 2))
          ))
          (net cnt1_3 (joined
           (portRef O (instanceRef cnt1_pad_3))
           (portRef (member cnt1 1))
          ))
          (net GNDZ0 (joined
           (portRef Z (instanceRef GND))
           (portRef I (instanceRef cnt1_pad_2))
           (portRef I (instanceRef cnt1_pad_3))
           (portRef I (instanceRef cnt1_pad_4))
          ))
          (net cnt1_4 (joined
           (portRef O (instanceRef cnt1_pad_4))
           (portRef (member cnt1 0))
          ))
          (net cnt2_c_0 (joined
           (portRef Q (instanceRef cnt2_1_0__Q))
           (portRef I (instanceRef cnt2_pad_0))
          ))
          (net cnt2_0 (joined
           (portRef O (instanceRef cnt2_pad_0))
           (portRef (member cnt2 4))
          ))
          (net cnt2_c_1 (joined
           (portRef Q (instanceRef cnt2_1_1__Q))
           (portRef I (instanceRef cnt2_pad_1))
          ))
          (net cnt2_1 (joined
           (portRef O (instanceRef cnt2_pad_1))
           (portRef (member cnt2 3))
          ))
          (net cnt2_2 (joined
           (portRef O (instanceRef cnt2_pad_2))
           (portRef (member cnt2 2))
          ))
          (net cnt2_3 (joined
           (portRef O (instanceRef cnt2_pad_3))
           (portRef (member cnt2 1))
          ))
          (net cnt2_c_4 (joined
           (portRef Q (instanceRef cnt2_1_2__Q))
           (portRef A (instanceRef cnt2_1_i_2))
           (portRef I (instanceRef cnt2_pad_2))
           (portRef I (instanceRef cnt2_pad_3))
           (portRef I (instanceRef cnt2_pad_4))
          ))
          (net cnt2_4 (joined
           (portRef O (instanceRef cnt2_pad_4))
           (portRef (member cnt2 0))
          ))
         )
        (property old_syn_reference_clock_1 (string "asyn_rst|clk,r=0.000000,f=500.000000,u=0.000000,p=1000.000000,clockgroup=Autoconstr_clkgroup_0,rd=0.000000,fd=0.000000,v=0,gen=1"))
       )
    )
  )
  (design asyn_rst (cellRef asyn_rst (libraryRef work)))
)

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