📄 gray_to_bin.vhd
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-- 格雷码-〉二进制码(解码):
-- 从左边第二位起,将每位与左边一位解码后的值异或,
-- 作为该位解码后的值(最左边一位依然不变).
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_signed.all;
entity gray_to_bin is
generic (n : integer := 3);
port (
reset : in std_logic;
gray : in std_logic_vector(n downto 0);
bin : out std_logic_vector(n downto 0)
);
end gray_to_bin;
architecture behav of gray_to_bin is
signal temp1,temp2 : std_logic_vector(n downto 0);
begin
temp1 <= gray;
process(reset,temp1,temp2)
variable i : integer range 0 to n-1 := 0;
begin
if reset = '1' then
temp2 <= (others => '0');
else
temp2(n) <= '0' xor temp1(n);
for i in n-1 downto 0 loop
temp2(i) <= temp2(i+1) xor temp1(i);
end loop;
end if;
end process;
bin <= temp2;
end behav;
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