uart_test.ide_des

自己实用Verilog编写的UART程序

KEY IDE_DES_TOOL "Designer"
KEY IDE_DES_FAMILY "ProASIC3"
KEY IDE_DES_DIE "IS4X4M1"
KEY IDE_DES_PACKAGE "pq208"
KEY IDE_DES_TOP_CELL_NAME "uart_test"
KEY IDE_DES_KEEP_PHY_CONSTR "TRUE"
KEY IDE_DES_KEEP_TIME_CONSTR "TRUE"
KEY IDE_DES_LAYOUT_DONE "TRUE"
KEY IDE_DES_BA_EXPORTED "FALSE"
KEY IDE_DES_ERROR_FOUND "FALSE"
KEY IDE_DES_ADB_PATH "C:\Actelprj\ProASIC3\UART\designer\impl1\uart_test.adb"
LIST SOURCE_FILES
VALUE "C:\Actelprj\ProASIC3\UART\synthesis\uart_test.edn;edn"
VALUE "C:\Actelprj\ProASIC3\UART\synthesis\uart_test_sdc.sdc;sdc"
ENDLIST
LIST OPTIONAL_FILES
VALUE "C:\Actelprj\ProASIC3\UART\synthesis\uart_test_sdc.sdc;Used"
ENDLIST